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Searched +full:- +full:cpu (Results 1 – 25 of 1321) sorted by relevance

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/external/grpc-grpc/src/csharp/
D	Grpc.sln	6 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Core", "Grpc.Core\Grpc.Core.csproj", "{BD… 8 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Auth", "Grpc.Auth\Grpc.Auth.csproj", "{2A… 10 …ct("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Core.Testing", "Grpc.Core.Testing\Grpc.Core.T… 12 …oject("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Core.Tests", "Grpc.Core.Tests\Grpc.Core.Te… 14 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Examples", "Grpc.Examples\Grpc.Examples.c… 16 …3F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Examples.MathClient", "Grpc.Examples.MathClient\Grpc.Exa… 18 …3F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Examples.MathServer", "Grpc.Examples.MathServer\Grpc.Exa… 20 …"{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.Examples.Tests", "Grpc.Examples.Tests\Grpc.Examp… 22 …ect("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.HealthCheck", "Grpc.HealthCheck\Grpc.HealthC… 24 …9103F-16F7-4668-BE54-9A1E7A4F7556}") = "Grpc.HealthCheck.Tests", "Grpc.HealthCheck.Tests\Grpc.Heal… [all …]
/external/arm-trusted-firmware/fdts/
D	fvp-defs-dynamiq.dtsi	`4 * SPDX-License-Identifier: BSD-3-Clause 27 * n - CPU number 28 * r - MPID 30 #define CPU(n, r) \ macro 31 CPU##n:cpu@r## { \ 32 device_type = "cpu"; \ 35 enable-method = "psci"; \ 36 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; \ 37 next-level-cache = <&L2_0>; \ 43 cpu = <&CONC(CPU, __COUNTER__)>; \ [all …]`
/external/ltp/testcases/kernel/hotplug/cpu_hotplug/include/
D	cpuhotplug_hotplug.sh	3 # cpuhotplug_hotplug.sh - Collection of functions for hotplugging 8 TIME=${TIME:-""} 16 echo `egrep [0-9]+: /proc/interrupts \| cut -d ':' -f 1` 20 # migrate_irq(CPU, IRQS) 23 # CPU number 27 CPU=${1#cpu} 28 MASK=$((1<<${CPU})) 39 # Echos the CPU affinity for the given process ID to stdout 43 AFFINITY=`taskset -p ${1}` 48 # set_affinity(PID, CPU) [all …]
/external/perfetto/test/trace_processor/profiling/
D	perf_sample_sc.out	1 "ts","cpu","cpu_mode","unwind_error","perf_session_id","cntr_name","is_timebase","tid","name" 2 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"__start_thread" 3 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZL15__pthread_startPv" 4 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN13thread_data_t10trampolineEPKS_" 5 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android14AndroidRuntime15javaThreadSh… 6 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android6Thread11_threadLoopEPv" 7 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android10PoolThread10threadLoopEv" 8 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android14IPCThreadState14joinThreadPo… 9 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android14IPCThreadState14executeComma… 10 105089621851721,7,"kernel","[NULL]",0,"cpu-clock",1,8817,"_ZN7android7BBinder8transactEjRKNS_6Parce… [all …]
/external/arm-trusted-firmware/docs/design/
D	cpu-specific-build-macros.rst	1 Arm CPU Specific Build Macros 4 This document describes the various build options present in the CPU specific 6 for a specific CPU on a platform. 9 ---------------------------------- 11 TF-A exports a series of build flags which control which security 14 - ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 17 no performance benefit for non-affected platforms, it just helps to comply 21 - ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep [all …]
/external/linux-kselftest/tools/testing/selftests/cpu-hotplug/
D	cpu-on-off-test.sh	2 # SPDX-License-Identifier: GPL-2.0 5 # Kselftest framework requirement - SKIP code is 4. 17 taskset -p 01 $$ 19 SYSFS=`mount -t sysfs \| head -1 \| awk '{ print $3 }'` 21 if [ ! -d "$SYSFS" ]; then 26 if ! ls $SYSFS/devices/system/cpu/cpu* > /dev/null 2>&1; then 27 echo $msg cpu hotplug is not supported >&2 31 echo "CPU online/offline summary:" 32 online_cpus=`cat $SYSFS/devices/system/cpu/online` 33 online_max=${online_cpus##*-} [all …]
/external/protobuf/csharp/src/
D	Google.Protobuf.sln	5 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "AddressBook", "AddressBook\AddressBook.csproj"… 7 …oject("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Google.Protobuf", "Google.Protobuf\Google.Proto… 9 …9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Google.Protobuf.Test", "Google.Protobuf.Test\Google.Pro… 11 …-16F7-4668-BE54-9A1E7A4F7556}") = "Google.Protobuf.Conformance", "Google.Protobuf.Conformance\Goog… 13 …3F-16F7-4668-BE54-9A1E7A4F7556}") = "Google.Protobuf.JsonDump", "Google.Protobuf.JsonDump\Google.P… 15 …-301F-11D3-BF4B-00C04F79EFBC}") = "Google.Protobuf.Benchmarks", "Google.Protobuf.Benchmarks\Google… 19 Debug\|Any CPU = Debug\|Any CPU 20 Release\|Any CPU = Release\|Any CPU 23 {AFB63919-1E05-43B4-802A-8FB8C9B2F463}.Debug\|Any CPU.ActiveCfg = Debug\|Any CPU 24 {AFB63919-1E05-43B4-802A-8FB8C9B2F463}.Debug\|Any CPU.Build.0 = Debug\|Any CPU [all …]
/external/llvm-project/clang/test/Misc/
D	target-invalid-cpu-note.c	1 // RUN: not %clang_cc1 -triple armv5--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 \| FileCheck %s … 2 // ARM: error: unknown target CPU 'not-a-cpu' 3 // ARM: note: valid target CPU values are: 4 // ARM-SAME: arm2 6 // RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 \| FileCheck %s … 7 // AARCH64: error: unknown target CPU 'not-a-cpu' 8 // AARCH64: note: valid target CPU values are: 9 // AARCH64-SAME: cortex-a35, 11 // RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 \| FileCheck %s --… 12 // TUNE_AARCH64: error: unknown target CPU 'not-a-cpu' [all …]
/external/llvm-project/llvm/unittests/Support/
D	Host.cpp	`1 //========- unittests/Support/Host.cpp - Host.cpp tests --------------========// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 #include "llvm/Config/llvm-config.h" 56 ASSERT_EQ(Num, -1); in TEST_F() 65 CPU implementer : 0x41 in TEST() 66 CPU architecture: 7 in TEST() 67 CPU variant : 0x2 in TEST() 68 CPU part : 0xc09 in TEST() 69 CPU revision : 10 in TEST() [all …]`
/external/llvm/test/MC/Mips/
D	target-soft-float.s	1 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+soft-float 2>&1 \|\ 2 # RUN: FileCheck %s --check-prefix=32 3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips64 -mattr=+soft-float 2>&1 \|\ 4 # RUN: FileCheck %s --check-prefix=64 5 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+soft-float 2>&1 \|\ 6 # RUN: FileCheck %s --check-prefix=R2 7 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r6 -mattr=+soft-float 2>&1 \|\ 8 # RUN: FileCheck %s --check-prefix=R6 12 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 14 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled [all …]
/external/llvm-project/llvm/test/MC/Mips/
D	target-soft-float.s	1 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+soft-float 2>&1 \|\ 2 # RUN: FileCheck %s --check-prefix=32 3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips64 -mattr=+soft-float 2>&1 \|\ 4 # RUN: FileCheck %s --check-prefix=64 5 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+soft-float 2>&1 \|\ 6 # RUN: FileCheck %s --check-prefix=R2 7 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r6 -mattr=+soft-float 2>&1 \|\ 8 # RUN: FileCheck %s --check-prefix=R6 12 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled 14 # 64: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled [all …]
/external/arm-trusted-firmware/plat/mediatek/mt8192/
D	plat_pm.c	`4 * SPDX-License-Identifier: BSD-3-Clause 28 * [0] : The CPU requires cluster power down 29 * [1] : The CPU requires cluster power on 37 /* per-CPU power state / 40 / platform CPU power domain - ops */ 44 int ret = -1; \ 45 if (plat_mt_pm != NULL && plat_mt_pm->_name != NULL) { \ 46 ret = plat_mt_pm->_name(_cpu, _state); \ 51 if (plat_mt_pm != NULL && plat_mt_pm->_name != NULL) { \ 52 (void) plat_mt_pm->_name(_cpu, _state); \ [all …]`
/external/cpuinfo/test/mock/
D	scaleway.h	`9 "CPU implementer\t: 0x43\n" 10 "CPU architecture: 8\n" 11 "CPU variant\t: 0x1\n" 12 "CPU part\t: 0x0a1\n" 13 "CPU revision\t: 1\n" 18 "CPU implementer\t: 0x43\n" 19 "CPU architecture: 8\n" 20 "CPU variant\t: 0x1\n" 21 "CPU part\t: 0x0a1\n" 22 "CPU revision\t: 1\n" [all …]`
/external/mesa3d/src/broadcom/common/
D	v3d_cpu_tiling.h	31 v3d_load_utile(void cpu, uint32_t cpu_stride, in v3d_load_utile() argument 38 d0-d7. in v3d_load_utile() 41 /* Store each 8-byte line to cpu-side destination, in v3d_load_utile() 44 "vst1.8 d0, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 45 "vst1.8 d1, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 46 "vst1.8 d2, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 47 "vst1.8 d3, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 48 "vst1.8 d4, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 49 "vst1.8 d5, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() 50 "vst1.8 d6, [%[cpu]], %[cpu_stride]\n" in v3d_load_utile() [all …]
/external/llvm-project/llvm/test/MC/Mips/mips32r2/
D	invalid-dspr2.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding \ 4 # RUN: -mcpu=mips32r2 2>%t1 8 …absq_s.ph $8,$a0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 9 …absq_s.qb $15,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 10 …absq_s.w $s3,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 11 …addq.ph $s1,$15,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 12 …addq_s.ph $s3,$s6,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 13 …addq_s.w $a2,$8,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 14 …addqh.ph $s4,$14,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 15 …addqh_r.ph $sp,$25,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… [all …]
D	invalid-dsp.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding \ 4 # RUN: -mcpu=mips32r2 2>%t1 8 …absq_s.ph $8,$a0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 9 …absq_s.w $s3,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 10 …addq.ph $s1,$15,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 11 …addq_s.ph $s3,$s6,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 12 …addq_s.w $a2,$8,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 13 …addsc $s8,$15,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 14 …addu.qb $s6,$v1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 15 …addu_s.qb $s4,$s8,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… [all …]
/external/llvm/test/MC/Mips/mips32r2/
D	invalid-dspr2.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding \ 4 # RUN: -mcpu=mips32r2 2>%t1 8 …absq_s.ph $8,$a0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 9 …absq_s.qb $15,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 10 …absq_s.w $s3,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 11 …addq.ph $s1,$15,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 12 …addq_s.ph $s3,$s6,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 13 …addq_s.w $a2,$8,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 14 …addqh.ph $s4,$14,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… 15 …addqh_r.ph $sp,$25,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f… [all …]
D	invalid-dsp.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding \ 4 # RUN: -mcpu=mips32r2 2>%t1 8 …absq_s.ph $8,$a0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 9 …absq_s.w $s3,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 10 …addq.ph $s1,$15,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 11 …addq_s.ph $s3,$s6,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 12 …addq_s.w $a2,$8,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 13 …addsc $s8,$15,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 14 …addu.qb $s6,$v1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 15 …addu_s.qb $s4,$s8,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… [all …]
/external/chromium-trace/catapult/systrace/systrace/test_data/
D	profile-chrome_systrace_perf_chrome_data	`1 …-engine-hh", "name": "[unknown]"}, "4490": {"category": "Kernel", "name": "__schedule", "parent": …`
/external/llvm-project/clang/test/Frontend/
D	x86-target-cpu.c	1 // Ensure we support the various CPU names. 3 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu nocona -verify %s 4 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu core2 -verify %s 5 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu penryn -verify %s 6 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu nehalem -verify %s 7 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu westmere -verify %s 8 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu sandybridge -verify %s 9 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu ivybridge -verify %s 10 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu haswell -verify %s 11 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu broadwell -verify %s [all …]
/external/tensorflow/tensorflow/core/kernels/linalg/
D	banded_triangular_solve_op_test.cc	7 http://www.apache.org/licenses/LICENSE-2.0 35 bandwidth.flat<int32>()(0) = -(num_bands - 1); in SetDiag() 37 TF_CHECK_OK(NodeBuilder(g->NewName("n"), "MatrixSetDiagV3") in SetDiag() 48 TF_CHECK_OK(NodeBuilder(g->NewName("n"), "BandedTriangularSolve") in BandedTriangularSolve() 59 TF_CHECK_OK(NodeBuilder(g->NewName("n"), "MatrixTriangularSolve") in MatrixTriangularSolve() 94 // Macro arguments names: --------------------------------------------------- // 110 ->UseRealTime(); 117 BM_BandedTriangularSolve(2, 32, 1, true, cpu); 118 BM_BandedTriangularSolve(2, 32, 1, false, cpu); 119 BM_BandedTriangularSolve(4, 32, 1, true, cpu); [all …]
/external/cpuinfo/test/name/
D	brand-string.cc	20 normalize_brand_string("Genuine Intel(R) CPU @ 2.33GHz\0")); in TEST() 22 normalize_brand_string(" Genuine Intel(R) CPU 3.00GHz\0")); in TEST() 24 normalize_brand_string(" Genuine Intel(R) CPU @ 2.60GHz\0")); in TEST() 26 normalize_brand_string("Genuine Intel(R) CPU 0000 @ 1.73GHz\0")); in TEST() 28 normalize_brand_string(" Genuine Intel(R) CPU @ 728\0MHz\0")); in TEST() 30 normalize_brand_string(" Genuine Intel(R) CPU 3.46GHz\0")); in TEST() 32 normalize_brand_string(" Genuine Intel(R) CPU @ 1.66GHz\0")); in TEST() 34 normalize_brand_string("Genuine Intel(R) CPU 0000 @ 2.40GHz\0")); in TEST() 38 normalize_brand_string(" Genuine Intel(R) CPU @ 2.40GHz\0")); in TEST() 40 normalize_brand_string("Genuine Intel(R) CPU 0 @ 1.60GHz\0")); in TEST() [all …]
/external/llvm-project/llvm/test/MC/Mips/mips1/
D	invalid-mips5.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 \ 8 …add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 9 …bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't e… 10 …bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't e… 11 …ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 12 …ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 13 …ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 14 …ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 15 …cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 16 …cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… [all …]
D	invalid-mips4.s	3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 \ 8 …bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't e… 9 …bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't e… 10 …ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 11 …ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 12 …ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 13 …ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 14 …cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 15 …cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 16 …cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… [all …]
/external/ltp/testcases/kernel/hotplug/cpu_hotplug/functional/
D	cpuhotplug01.sh	`26 usage: $0 -c cpu -l loop -n timeon -f timeoff -e timed 29 -c cpu which is specified for testing 30 -l number of cycle test 31 -n time delay after an online of cpu 32 -f time delay after offline of cpu 33 -e time delay before start of entire new cycle 48 # Restore CPU states 53 # do_offline(CPU) 55 # Migrates some irq's onto the CPU, then offlines it 59 CPU=${1#cpu} [all …]`

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