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/external/llvm/test/MC/Disassembler/AMDGPU/
Dmubuf_vi.txt3 # VI: buffer_load_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x01,0x01]
4 0x00 0x00 0x50 0xe0 0x00 0x01 0x01 0x01
6 …uffer_load_dword v1, off, s[4:7], s1 offset:4 ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x01,0x01,0x01]
7 0x04 0x00 0x50 0xe0 0x00 0x01 0x01 0x01
9 …r_load_dword v1, off, s[4:7], s1 offset:4 glc ; encoding: [0x04,0x40,0x50,0xe0,0x00,0x01,0x01,0x01]
10 0x04 0x40 0x50 0xe0 0x00 0x01 0x01 0x01
12 …r_load_dword v1, off, s[4:7], s1 offset:4 slc ; encoding: [0x04,0x00,0x52,0xe0,0x00,0x01,0x01,0x01]
13 0x04 0x00 0x52 0xe0 0x00 0x01 0x01 0x01
15 …r_load_dword v1, off, s[4:7], s1 offset:4 tfe ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x01,0x81,0x01]
16 0x04 0x00 0x50 0xe0 0x00 0x01 0x81 0x01
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dmubuf_vi.txt3 # VI: buffer_load_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x01,0x01]
4 0x00 0x00 0x50 0xe0 0x00 0x01 0x01 0x01
6 …uffer_load_dword v1, off, s[4:7], s1 offset:4 ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x01,0x01,0x01]
7 0x04 0x00 0x50 0xe0 0x00 0x01 0x01 0x01
9 …r_load_dword v1, off, s[4:7], s1 offset:4 glc ; encoding: [0x04,0x40,0x50,0xe0,0x00,0x01,0x01,0x01]
10 0x04 0x40 0x50 0xe0 0x00 0x01 0x01 0x01
12 …r_load_dword v1, off, s[4:7], s1 offset:4 slc ; encoding: [0x04,0x00,0x52,0xe0,0x00,0x01,0x01,0x01]
13 0x04 0x00 0x52 0xe0 0x00 0x01 0x01 0x01
15 …r_load_dword v1, off, s[4:7], s1 offset:4 tfe ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x01,0x81,0x01]
16 0x04 0x00 0x50 0xe0 0x00 0x01 0x81 0x01
[all …]
Dflat_gfx9.txt3 # CHECK: flat_atomic_add v[0:1], v0 ; encoding: [0x00,0x00,0x08,0xdd,0x00,0x00,0x00,0x00]
4 0x00,0x00,0x08,0xdd,0x00,0x00,0x00,0x00
6 # CHECK: flat_atomic_add v[0:1], v0 offset:7 ; encoding: [0x07,0x00,0x08,0xdd,0x00,0x00,0x00,0x0…
7 0x07,0x00,0x08,0xdd,0x00,0x00,0x00,0x00
9 # CHECK: flat_atomic_add v0, v[0:1], v0 offset:4095 glc ; encoding: [0xff,0x0f,0x09,0xdd,0x00,0x…
10 0xff,0x0f,0x09,0xdd,0x00,0x00,0x00,0x00
12 # CHECK: flat_atomic_add v0, v[0:1], v0 offset:4095 glc slc ; encoding: [0xff,0x0f,0x0b,0xdd,0x00,0…
13 0xff,0x0f,0x0b,0xdd,0x00,0x00,0x00,0x00
15 # CHECK: flat_atomic_add v0, v[0:1], v0 glc ; encoding: [0x00,0x00,0x09,0xdd,0x00,0x00,0x00,0x00]
16 0x00,0x00,0x09,0xdd,0x00,0x00,0x00,0x00
[all …]
/external/python/cpython2/Demo/tix/bitmaps/
Dnetw.xbm4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0x00, 0x02, 0x40,
5 0x00, 0x00, 0xfa, 0x5f, 0x00, 0x00, 0x0a, 0x50, 0x00, 0x00, 0x0a, 0x52,
6 0x00, 0x00, 0x0a, 0x52, 0x00, 0x00, 0x8a, 0x51, 0x00, 0x00, 0x0a, 0x50,
7 0x00, 0x00, 0x4a, 0x50, 0x00, 0x00, 0x0a, 0x50, 0x00, 0x00, 0x0a, 0x50,
8 0x00, 0x00, 0xfa, 0x5f, 0x00, 0x00, 0x02, 0x40, 0xfe, 0x7f, 0x52, 0x55,
9 0x02, 0x40, 0xaa, 0x6a, 0xfa, 0x5f, 0xfe, 0x7f, 0x0a, 0x50, 0xfe, 0x7f,
10 0x0a, 0x52, 0x80, 0x00, 0x0a, 0x52, 0x80, 0x00, 0x8a, 0x51, 0x80, 0x00,
11 0x0a, 0x50, 0x80, 0x00, 0x4a, 0x50, 0x80, 0x00, 0x0a, 0x50, 0xe0, 0x03,
12 0x0a, 0x50, 0x20, 0x02, 0xfa, 0xdf, 0x3f, 0x03, 0x02, 0x40, 0xa0, 0x02,
13 0x52, 0x55, 0xe0, 0x03, 0xaa, 0x6a, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0x00,
[all …]
/external/vixl/test/aarch64/traces/
Dsim-pmul-16b-trace-aarch64.h38 0x05, 0x11, 0x51, 0x54, 0x55, 0x00, 0x01, 0x04, 0x05, 0x44, 0x50, 0x40, 0x51, 0x54, 0x55, 0x00,
39 0x0f, 0x19, 0xd6, 0x2a, 0x80, 0x80, 0x82, 0x86, 0xfe, 0x78, 0x20, 0x58, 0x56, 0xaa, 0x00, 0x00,
40 0xf7, 0xe6, 0xab, 0x00, 0xff, 0x00, 0x03, 0x54, 0x54, 0x30, 0xdc, 0x50, 0xab, 0x00, 0xff, 0x00,
41 0xa2, 0xb3, 0x80, 0x7e, 0x7e, 0x80, 0xaa, 0x98, 0x08, 0x32, 0x88, 0xa8, 0x00, 0xfe, 0xfe, 0x00,
42 0x91, 0x80, 0xfd, 0xfc, 0x01, 0x00, 0xcc, 0xf0, 0x87, 0xcc, 0x44, 0x00, 0xfd, 0xfc, 0xf8, 0x00,
43 0x80, 0xd5, 0x7a, 0x82, 0x66, 0x00, 0xf8, 0x7a, 0x02, 0x66, 0x00, 0xf8, 0xfa, 0xf0, 0x11, 0x00,
44 0xb3, 0x2a, 0x07, 0xcc, 0x44, 0x00, 0x7d, 0xfc, 0x81, 0x00, 0xcc, 0xf0, 0xe8, 0x22, 0x33, 0x00,
45 0xe6, 0x7f, 0x32, 0x88, 0xa8, 0x80, 0xfe, 0x7e, 0x00, 0xaa, 0x98, 0xc0, 0x77, 0x66, 0x2b, 0x00,
46 0xd5, 0x22, 0xdc, 0x50, 0x2b, 0x00, 0x7f, 0x00, 0x83, 0x54, 0x60, 0x88, 0x99, 0x56, 0x2a, 0x00,
47 0x1e, 0x3c, 0x58, 0xd6, 0xaa, 0x80, 0x00, 0x82, 0x06, 0x50, 0x14, 0x98, 0xd1, 0x54, 0xd5, 0x00,
[all …]
/external/vixl/test/aarch32/traces/
Dassembler-cond-rd-rn-operand-rm-subs-a32.h38 0x0e, 0x40, 0x55, 0xd0 // subs le r4 r5 r14
41 0x0a, 0x50, 0x5b, 0xa0 // subs ge r5 r11 r10
44 0x09, 0x00, 0x59, 0x90 // subs ls r0 r9 r9
47 0x02, 0x80, 0x57, 0xd0 // subs le r8 r7 r2
50 0x0d, 0x10, 0x5a, 0x00 // subs eq r1 r10 r13
53 0x02, 0x90, 0x5c, 0xd0 // subs le r9 r12 r2
56 0x05, 0x60, 0x51, 0x50 // subs pl r6 r1 r5
59 0x06, 0x10, 0x5c, 0xa0 // subs ge r1 r12 r6
62 0x03, 0xd0, 0x5c, 0x30 // subs cc r13 r12 r3
65 0x09, 0x20, 0x54, 0xc0 // subs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-ands-a32.h38 0x0e, 0x40, 0x15, 0xd0 // ands le r4 r5 r14
41 0x0a, 0x50, 0x1b, 0xa0 // ands ge r5 r11 r10
44 0x09, 0x00, 0x19, 0x90 // ands ls r0 r9 r9
47 0x02, 0x80, 0x17, 0xd0 // ands le r8 r7 r2
50 0x0d, 0x10, 0x1a, 0x00 // ands eq r1 r10 r13
53 0x02, 0x90, 0x1c, 0xd0 // ands le r9 r12 r2
56 0x05, 0x60, 0x11, 0x50 // ands pl r6 r1 r5
59 0x06, 0x10, 0x1c, 0xa0 // ands ge r1 r12 r6
62 0x03, 0xd0, 0x1c, 0x30 // ands cc r13 r12 r3
65 0x09, 0x20, 0x14, 0xc0 // ands gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-eor-a32.h38 0x0e, 0x40, 0x25, 0xd0 // eor le r4 r5 r14
41 0x0a, 0x50, 0x2b, 0xa0 // eor ge r5 r11 r10
44 0x09, 0x00, 0x29, 0x90 // eor ls r0 r9 r9
47 0x02, 0x80, 0x27, 0xd0 // eor le r8 r7 r2
50 0x0d, 0x10, 0x2a, 0x00 // eor eq r1 r10 r13
53 0x02, 0x90, 0x2c, 0xd0 // eor le r9 r12 r2
56 0x05, 0x60, 0x21, 0x50 // eor pl r6 r1 r5
59 0x06, 0x10, 0x2c, 0xa0 // eor ge r1 r12 r6
62 0x03, 0xd0, 0x2c, 0x30 // eor cc r13 r12 r3
65 0x09, 0x20, 0x24, 0xc0 // eor gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-adcs-a32.h38 0x0e, 0x40, 0xb5, 0xd0 // adcs le r4 r5 r14
41 0x0a, 0x50, 0xbb, 0xa0 // adcs ge r5 r11 r10
44 0x09, 0x00, 0xb9, 0x90 // adcs ls r0 r9 r9
47 0x02, 0x80, 0xb7, 0xd0 // adcs le r8 r7 r2
50 0x0d, 0x10, 0xba, 0x00 // adcs eq r1 r10 r13
53 0x02, 0x90, 0xbc, 0xd0 // adcs le r9 r12 r2
56 0x05, 0x60, 0xb1, 0x50 // adcs pl r6 r1 r5
59 0x06, 0x10, 0xbc, 0xa0 // adcs ge r1 r12 r6
62 0x03, 0xd0, 0xbc, 0x30 // adcs cc r13 r12 r3
65 0x09, 0x20, 0xb4, 0xc0 // adcs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-and-a32.h38 0x0e, 0x40, 0x05, 0xd0 // and_ le r4 r5 r14
41 0x0a, 0x50, 0x0b, 0xa0 // and_ ge r5 r11 r10
44 0x09, 0x00, 0x09, 0x90 // and_ ls r0 r9 r9
47 0x02, 0x80, 0x07, 0xd0 // and_ le r8 r7 r2
50 0x0d, 0x10, 0x0a, 0x00 // and_ eq r1 r10 r13
53 0x02, 0x90, 0x0c, 0xd0 // and_ le r9 r12 r2
56 0x05, 0x60, 0x01, 0x50 // and_ pl r6 r1 r5
59 0x06, 0x10, 0x0c, 0xa0 // and_ ge r1 r12 r6
62 0x03, 0xd0, 0x0c, 0x30 // and_ cc r13 r12 r3
65 0x09, 0x20, 0x04, 0xc0 // and_ gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-sbcs-a32.h38 0x0e, 0x40, 0xd5, 0xd0 // sbcs le r4 r5 r14
41 0x0a, 0x50, 0xdb, 0xa0 // sbcs ge r5 r11 r10
44 0x09, 0x00, 0xd9, 0x90 // sbcs ls r0 r9 r9
47 0x02, 0x80, 0xd7, 0xd0 // sbcs le r8 r7 r2
50 0x0d, 0x10, 0xda, 0x00 // sbcs eq r1 r10 r13
53 0x02, 0x90, 0xdc, 0xd0 // sbcs le r9 r12 r2
56 0x05, 0x60, 0xd1, 0x50 // sbcs pl r6 r1 r5
59 0x06, 0x10, 0xdc, 0xa0 // sbcs ge r1 r12 r6
62 0x03, 0xd0, 0xdc, 0x30 // sbcs cc r13 r12 r3
65 0x09, 0x20, 0xd4, 0xc0 // sbcs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-sbc-a32.h38 0x0e, 0x40, 0xc5, 0xd0 // sbc le r4 r5 r14
41 0x0a, 0x50, 0xcb, 0xa0 // sbc ge r5 r11 r10
44 0x09, 0x00, 0xc9, 0x90 // sbc ls r0 r9 r9
47 0x02, 0x80, 0xc7, 0xd0 // sbc le r8 r7 r2
50 0x0d, 0x10, 0xca, 0x00 // sbc eq r1 r10 r13
53 0x02, 0x90, 0xcc, 0xd0 // sbc le r9 r12 r2
56 0x05, 0x60, 0xc1, 0x50 // sbc pl r6 r1 r5
59 0x06, 0x10, 0xcc, 0xa0 // sbc ge r1 r12 r6
62 0x03, 0xd0, 0xcc, 0x30 // sbc cc r13 r12 r3
65 0x09, 0x20, 0xc4, 0xc0 // sbc gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-add-a32.h38 0x0e, 0x40, 0x85, 0xd0 // add le r4 r5 r14
41 0x0a, 0x50, 0x8b, 0xa0 // add ge r5 r11 r10
44 0x09, 0x00, 0x89, 0x90 // add ls r0 r9 r9
47 0x02, 0x80, 0x87, 0xd0 // add le r8 r7 r2
50 0x0d, 0x10, 0x8a, 0x00 // add eq r1 r10 r13
53 0x02, 0x90, 0x8c, 0xd0 // add le r9 r12 r2
56 0x05, 0x60, 0x81, 0x50 // add pl r6 r1 r5
59 0x06, 0x10, 0x8c, 0xa0 // add ge r1 r12 r6
62 0x03, 0xd0, 0x8c, 0x30 // add cc r13 r12 r3
65 0x09, 0x20, 0x84, 0xc0 // add gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-rscs-a32.h38 0x0e, 0x40, 0xf5, 0xd0 // rscs le r4 r5 r14
41 0x0a, 0x50, 0xfb, 0xa0 // rscs ge r5 r11 r10
44 0x09, 0x00, 0xf9, 0x90 // rscs ls r0 r9 r9
47 0x02, 0x80, 0xf7, 0xd0 // rscs le r8 r7 r2
50 0x0d, 0x10, 0xfa, 0x00 // rscs eq r1 r10 r13
53 0x02, 0x90, 0xfc, 0xd0 // rscs le r9 r12 r2
56 0x05, 0x60, 0xf1, 0x50 // rscs pl r6 r1 r5
59 0x06, 0x10, 0xfc, 0xa0 // rscs ge r1 r12 r6
62 0x03, 0xd0, 0xfc, 0x30 // rscs cc r13 r12 r3
65 0x09, 0x20, 0xf4, 0xc0 // rscs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-rsc-a32.h38 0x0e, 0x40, 0xe5, 0xd0 // rsc le r4 r5 r14
41 0x0a, 0x50, 0xeb, 0xa0 // rsc ge r5 r11 r10
44 0x09, 0x00, 0xe9, 0x90 // rsc ls r0 r9 r9
47 0x02, 0x80, 0xe7, 0xd0 // rsc le r8 r7 r2
50 0x0d, 0x10, 0xea, 0x00 // rsc eq r1 r10 r13
53 0x02, 0x90, 0xec, 0xd0 // rsc le r9 r12 r2
56 0x05, 0x60, 0xe1, 0x50 // rsc pl r6 r1 r5
59 0x06, 0x10, 0xec, 0xa0 // rsc ge r1 r12 r6
62 0x03, 0xd0, 0xec, 0x30 // rsc cc r13 r12 r3
65 0x09, 0x20, 0xe4, 0xc0 // rsc gt r2 r4 r9
[all …]
/external/capstone/suite/MC/Mips/
Dmicromips-expansions.s.cs2 0xa0,0x50,0x7b,0x00 = ori $a1, $zero, 123
3 0xc0,0x30,0xd7,0xf6 = addiu $a2, $zero, -2345
4 0xa7,0x41,0x01,0x00 = lui $a3, 1
5 0xe7,0x50,0x02,0x00 = ori $a3, $a3, 2
6 0x80,0x30,0x14,0x00 = addiu $a0, $zero, 20
7 0xa7,0x41,0x01,0x00 = lui $a3, 1
8 0xe7,0x50,0x02,0x00 = ori $a3, $a3, 2
9 0x85,0x30,0x14,0x00 = addiu $a0, $a1, 20
10 0xa7,0x41,0x01,0x00 = lui $a3, 1
11 0xe7,0x50,0x02,0x00 = ori $a3, $a3, 2
[all …]
/external/capstone/suite/MC/ARM/
Dneon-add-encoding.s.cs2 0xa0,0x08,0x41,0xf2 = vadd.i8 d16, d17, d16
3 0xa0,0x08,0x51,0xf2 = vadd.i16 d16, d17, d16
4 0xa0,0x08,0x71,0xf2 = vadd.i64 d16, d17, d16
5 0xa0,0x08,0x61,0xf2 = vadd.i32 d16, d17, d16
6 0xa1,0x0d,0x40,0xf2 = vadd.f32 d16, d16, d17
7 0xe2,0x0d,0x40,0xf2 = vadd.f32 q8, q8, q9
8 0xa0,0x00,0xc1,0xf2 = vaddl.s8 q8, d17, d16
9 0xa0,0x00,0xd1,0xf2 = vaddl.s16 q8, d17, d16
10 0xa0,0x00,0xe1,0xf2 = vaddl.s32 q8, d17, d16
11 0xa0,0x00,0xc1,0xf3 = vaddl.u8 q8, d17, d16
[all …]
Dneont2-add-encoding.s.cs2 0x41,0xef,0xa0,0x08 = vadd.i8 d16, d17, d16
3 0x51,0xef,0xa0,0x08 = vadd.i16 d16, d17, d16
4 0x71,0xef,0xa0,0x08 = vadd.i64 d16, d17, d16
5 0x61,0xef,0xa0,0x08 = vadd.i32 d16, d17, d16
6 0x40,0xef,0xa1,0x0d = vadd.f32 d16, d16, d17
7 0x40,0xef,0xe2,0x0d = vadd.f32 q8, q8, q9
8 0xc1,0xef,0xa0,0x00 = vaddl.s8 q8, d17, d16
9 0xd1,0xef,0xa0,0x00 = vaddl.s16 q8, d17, d16
10 0xe1,0xef,0xa0,0x00 = vaddl.s32 q8, d17, d16
11 0xc1,0xff,0xa0,0x00 = vaddl.u8 q8, d17, d16
[all …]
Dneon-cmp-encoding.s.cs2 0xb1,0x08,0x40,0xf3 = vceq.i8 d16, d16, d17
3 0xb1,0x08,0x50,0xf3 = vceq.i16 d16, d16, d17
4 0xb1,0x08,0x60,0xf3 = vceq.i32 d16, d16, d17
5 0xa1,0x0e,0x40,0xf2 = vceq.f32 d16, d16, d17
6 0xf2,0x08,0x40,0xf3 = vceq.i8 q8, q8, q9
7 0xf2,0x08,0x50,0xf3 = vceq.i16 q8, q8, q9
8 0xf2,0x08,0x60,0xf3 = vceq.i32 q8, q8, q9
9 0xe2,0x0e,0x40,0xf2 = vceq.f32 q8, q8, q9
10 0xb1,0x03,0x40,0xf2 = vcge.s8 d16, d16, d17
11 0xb1,0x03,0x50,0xf2 = vcge.s16 d16, d16, d17
[all …]
Dneont2-mov-encoding.s.cs2 0xc0,0xef,0x18,0x0e = vmov.i8 d16, #0x8
3 0xc1,0xef,0x10,0x08 = vmov.i16 d16, #0x10
4 0xc1,0xef,0x10,0x0a = vmov.i16 d16, #0x1000
5 0xc2,0xef,0x10,0x00 = vmov.i32 d16, #0x20
6 0xc2,0xef,0x10,0x02 = vmov.i32 d16, #0x2000
7 0xc2,0xef,0x10,0x04 = vmov.i32 d16, #0x200000
8 0xc2,0xef,0x10,0x06 = vmov.i32 d16, #0x20000000
9 0xc2,0xef,0x10,0x0c = vmov.i32 d16, #0x20ff
10 0xc2,0xef,0x10,0x0d = vmov.i32 d16, #0x20ffff
11 0xc1,0xff,0x33,0x0e = vmov.i64 d16, #0xff0000ff0000ffff
[all …]
/external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/gpio/
Dmtgpio.h16 #define RSUCCESS 0
60 GPIO_MODE_GPIO = 0,
61 GPIO_MODE_00 = 0,
77 MT_GPIO_DIR_OUT = 0,
86 MT_GPIO_PULL_DISABLE = 0,
99 MT_GPIO_PULL_NONE = 0,
109 MT_GPIO_OUT_ZERO = 0,
120 MT_GPIO_IN_ZERO = 0,
161 PIN(0, 0, 9, 0x23, 0xb0),
162 PIN(1, 0, 10, 0x23, 0xb0),
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AI1cmp-arm.txt4 # CHECK: 0x01 0x10 0x50 0x03
5 0x01 0x10 0x50 0x03
8 # CHECK: 0x82 0x10 0x50 0x01
9 0x82 0x10 0x50 0x01
12 # CHECK: 0x02 0x10 0x50 0x01
13 0x02 0x10 0x50 0x01
16 # CHECK: 0x1f 0x01 0x52 0x01
17 0x1f 0x01 0x52 0x01
20 # CHECK: 0x10 0x11 0x52 0x01
21 0x10 0x11 0x52 0x01
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AI1cmp-arm.txt4 # CHECK: 0x01 0x10 0x50 0x03
5 0x01 0x10 0x50 0x03
8 # CHECK: 0x82 0x10 0x50 0x01
9 0x82 0x10 0x50 0x01
12 # CHECK: 0x02 0x10 0x50 0x01
13 0x02 0x10 0x50 0x01
16 # CHECK: 0x1f 0x01 0x52 0x01
17 0x1f 0x01 0x52 0x01
20 # CHECK: 0x10 0x11 0x52 0x01
21 0x10 0x11 0x52 0x01
[all …]
/external/llvm-project/llvm/test/MC/AMDGPU/
Dflat-scratch-instructions.s9 // GFX10: encoding: [0x00,0x40,0x20,0xdc,0x02,0x00,0x7d,0x01]
10 // GFX9: scratch_load_ubyte v1, v2, off ; encoding: [0x00,0x40,0x40,0xdc,0x02,0x00,0x7f,0x01]
14 // GFX10: encoding: [0x00,0x50,0x20,0xdc,0x02,0x00,0x7d,0x01]
19 // GFX10: encoding: [0x00,0x40,0x24,0xdc,0x02,0x00,0x7d,0x01]
20 // GFX9: scratch_load_sbyte v1, v2, off ; encoding: [0x00,0x40,0x44,0xdc,0x02,0x00,0x7f,0x01]
24 // GFX10: encoding: [0x00,0x50,0x24,0xdc,0x02,0x00,0x7d,0x01]
29 // GFX10: encoding: [0x00,0x40,0x28,0xdc,0x02,0x00,0x7d,0x01]
30 // GFX9: scratch_load_ushort v1, v2, off ; encoding: [0x00,0x40,0x48,0xdc,0x02,0x00,0x7f,0x01]
34 // GFX10: encoding: [0x00,0x50,0x28,0xdc,0x02,0x00,0x7d,0x01]
39 // GFX10: encoding: [0x00,0x40,0x2c,0xdc,0x02,0x00,0x7d,0x01]
[all …]
/external/puffin/src/
Dpatching_unittest.cc19 #define PRINT_SAMPLE 0 // Set to 1 if you want to print the generated samples.
33 for (size_t idx = 0; idx < array.size(); idx++) { in PrintArray()
34 std::cout << " 0x" << std::hex << std::uppercase << std::setfill('0') in PrintArray()
41 if ((idx + 1) % 12 == 0) { in PrintArray()
49 0x50, 0x55, 0x46, 0x31, 0x00, 0x00, 0x00, 0x51, 0x08, 0x01, 0x12, 0x27,
50 0x0A, 0x04, 0x08, 0x10, 0x10, 0x32, 0x0A, 0x04, 0x08, 0x50, 0x10, 0x0A,
51 0x0A, 0x04, 0x08, 0x60, 0x10, 0x12, 0x12, 0x04, 0x08, 0x10, 0x10, 0x58,
52 0x12, 0x04, 0x08, 0x78, 0x10, 0x28, 0x12, 0x05, 0x08, 0xA8, 0x01, 0x10,
53 0x38, 0x18, 0x1F, 0x1A, 0x24, 0x0A, 0x02, 0x10, 0x32, 0x0A, 0x04, 0x08,
54 0x48, 0x10, 0x50, 0x0A, 0x05, 0x08, 0x98, 0x01, 0x10, 0x12, 0x12, 0x02,
[all …]

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