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/external/icu/icu4c/source/data/mappings/
Dicu-internal-compound-d5.ucm24 <U2013> \xA1\xB9 |0
25 <U2035> \xA1\xEB |0
26 <U2105> \xA2\xA2 |0
27 <U2215> \xA2\xE1 |0
28 <U221F> \xA2\xC9 |0
29 <U22BF> \xA2\xCA |0
30 <U2400> \xC2\xA1 |0
31 <U2401> \xC2\xA2 |0
32 <U2402> \xC2\xA3 |0
33 <U2403> \xC2\xA4 |0
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop_dpp.s11 …: v_mov_b32_dpp v0, v0 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,…
12 v_mov_b32 v0, v0 quad_perm:[0,2,1,1]
15 …I: v_mov_b32_dpp v0, v0 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
19 …: v_mov_b32_dpp v0, v0 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
20 v_mov_b32 v0, v0 row_shr:0xf
23 …: v_mov_b32_dpp v0, v0 row_ror:12 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
24 v_mov_b32 v0, v0 row_ror:0xc
27 …: v_mov_b32_dpp v0, v0 wave_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
31 …: v_mov_b32_dpp v0, v0 wave_rol:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
35 …: v_mov_b32_dpp v0, v0 wave_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Ddpp_vi.txt3 …: v_mov_b32_dpp v0, v0 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,…
4 0xfa 0x02 0x00 0x7e 0x00 0x58 0x00 0xff
6 …I: v_mov_b32_dpp v0, v0 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
7 0xfa 0x02 0x00 0x7e 0x00 0x01 0x01 0xff
9 …: v_mov_b32_dpp v0, v0 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
10 0xfa 0x02 0x00 0x7e 0x00 0x1f 0x01 0xff
12 …: v_mov_b32_dpp v0, v0 row_ror:12 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
13 0xfa 0x02 0x00 0x7e 0x00 0x2c 0x01 0xff
15 …: v_mov_b32_dpp v0, v0 wave_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
16 0xfa 0x02 0x00 0x7e 0x00 0x30 0x01 0xff
[all …]
Dvop3_gfx9.txt3 # GFX9: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
4 0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04
6 # GFX9: v_fma_f16 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x24]
7 0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x24
9 # GFX9: v_fma_f16 v5, v1, |v2|, v3 ; encoding: [0x05,0x02,0x06,0xd2,0x01,0x05,0x0e,0x04]
10 0x05,0x02,0x06,0xd2,0x01,0x05,0x0e,0x04
12 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0…
13 0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0x04
15 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0…
16 0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0x04
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Ddpp_vi.txt3 …: v_mov_b32_dpp v0, v0 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,…
4 0xfa 0x02 0x00 0x7e 0x00 0x58 0x00 0xff
6 …I: v_mov_b32_dpp v0, v0 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
7 0xfa 0x02 0x00 0x7e 0x00 0x01 0x01 0xff
9 …: v_mov_b32_dpp v0, v0 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
10 0xfa 0x02 0x00 0x7e 0x00 0x1f 0x01 0xff
12 …: v_mov_b32_dpp v0, v0 row_ror:12 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
13 0xfa 0x02 0x00 0x7e 0x00 0x2c 0x01 0xff
15 …: v_mov_b32_dpp v0, v0 wave_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
16 0xfa 0x02 0x00 0x7e 0x00 0x30 0x01 0xff
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/X86/
Dmoffs.txt5 # 16: movb 0x5a5a, %al # encoding: [0xa0,0x5a,0x5a]
6 # 32: movb 0x5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a]
7 # 64: movabsb 0x5a5a5a5a5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
8 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
10 # 16: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
11 # 32: movb 0x5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a]
12 # 64: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
13 0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
15 # 16: movw 0x5a5a, %ax # encoding: [0xa1,0x5a,0x5a]
16 # 32: movl 0x5a5a5a5a, %eax # encoding: [0xa1,0x5a,0x5a,0x5a,0x5a]
[all …]
/external/llvm/test/MC/Disassembler/X86/
Dmoffs.txt5 # 16: movb 0x5a5a, %al # encoding: [0xa0,0x5a,0x5a]
6 # 32: movb 0x5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a]
7 # 64: movabsb 0x5a5a5a5a5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
8 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
10 # 16: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
11 # 32: movb 0x5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a]
12 # 64: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
13 0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
15 # 16: movw 0x5a5a, %ax # encoding: [0xa1,0x5a,0x5a]
16 # 32: movl 0x5a5a5a5a, %eax # encoding: [0xa1,0x5a,0x5a,0x5a,0x5a]
[all …]
/external/llvm-project/llvm/test/MC/AMDGPU/
Dvop_dpp.s15 …: v_mov_b32_dpp v0, v0 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,…
16 v_mov_b32 v0, v0 quad_perm:[0,2,1,1]
19 …9: v_mov_b32_dpp v0, v0 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
23 …: v_mov_b32_dpp v0, v0 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
24 v_mov_b32 v0, v0 row_shr:0xf
27 …: v_mov_b32_dpp v0, v0 row_ror:12 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
28 v_mov_b32 v0, v0 row_ror:0xc
31 …: v_mov_b32_dpp v0, v0 wave_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
35 …: v_mov_b32_dpp v0, v0 wave_rol:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
39 …: v_mov_b32_dpp v0, v0 wave_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00…
[all …]
/external/capstone/suite/MC/ARM/
Dneont2-mul-encoding.s.cs2 0x40,0xef,0xb1,0x09 = vmul.i8 d16, d16, d17
3 0x50,0xef,0xb1,0x09 = vmul.i16 d16, d16, d17
4 0x60,0xef,0xb1,0x09 = vmul.i32 d16, d16, d17
5 0x40,0xff,0xb1,0x0d = vmul.f32 d16, d16, d17
6 0x40,0xef,0xf2,0x09 = vmul.i8 q8, q8, q9
7 0x50,0xef,0xf2,0x09 = vmul.i16 q8, q8, q9
8 0x60,0xef,0xf2,0x09 = vmul.i32 q8, q8, q9
9 0x40,0xff,0xf2,0x0d = vmul.f32 q8, q8, q9
10 0x40,0xff,0xb1,0x09 = vmul.p8 d16, d16, d17
11 0x40,0xff,0xf2,0x09 = vmul.p8 q8, q8, q9
[all …]
Dneon-absdiff-encoding.s.cs2 0xa1,0x07,0x40,0xf2 = vabd.s8 d16, d16, d17
3 0xa1,0x07,0x50,0xf2 = vabd.s16 d16, d16, d17
4 0xa1,0x07,0x60,0xf2 = vabd.s32 d16, d16, d17
5 0xa1,0x07,0x40,0xf3 = vabd.u8 d16, d16, d17
6 0xa1,0x07,0x50,0xf3 = vabd.u16 d16, d16, d17
7 0xa1,0x07,0x60,0xf3 = vabd.u32 d16, d16, d17
8 0xa1,0x0d,0x60,0xf3 = vabd.f32 d16, d16, d17
9 0xe2,0x07,0x40,0xf2 = vabd.s8 q8, q8, q9
10 0xe2,0x07,0x50,0xf2 = vabd.s16 q8, q8, q9
11 0xe2,0x07,0x60,0xf2 = vabd.s32 q8, q8, q9
[all …]
Dneont2-absdiff-encoding.s.cs2 0x40,0xef,0xa1,0x07 = vabd.s8 d16, d16, d17
3 0x50,0xef,0xa1,0x07 = vabd.s16 d16, d16, d17
4 0x60,0xef,0xa1,0x07 = vabd.s32 d16, d16, d17
5 0x40,0xff,0xa1,0x07 = vabd.u8 d16, d16, d17
6 0x50,0xff,0xa1,0x07 = vabd.u16 d16, d16, d17
7 0x60,0xff,0xa1,0x07 = vabd.u32 d16, d16, d17
8 0x60,0xff,0xa1,0x0d = vabd.f32 d16, d16, d17
9 0x40,0xef,0xe2,0x07 = vabd.s8 q8, q8, q9
10 0x50,0xef,0xe2,0x07 = vabd.s16 q8, q8, q9
11 0x60,0xef,0xe2,0x07 = vabd.s32 q8, q8, q9
[all …]
Dneon-pairwise-encoding.s.cs2 0xb0,0x0b,0x41,0xf2 = vpadd.i8 d16, d17, d16
3 0xb0,0x0b,0x51,0xf2 = vpadd.i16 d16, d17, d16
4 0xb0,0x0b,0x61,0xf2 = vpadd.i32 d16, d17, d16
5 0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17
6 0xb0,0x1b,0x41,0xf2 = vpadd.i8 d17, d17, d16
7 0xb0,0x1b,0x51,0xf2 = vpadd.i16 d17, d17, d16
8 0xb0,0x1b,0x61,0xf2 = vpadd.i32 d17, d17, d16
9 0xa1,0x0d,0x40,0xf3 = vpadd.f32 d16, d16, d17
10 0x20,0x02,0xf0,0xf3 = vpaddl.s8 d16, d16
11 0x20,0x02,0xf4,0xf3 = vpaddl.s16 d16, d16
[all …]
Dneon-mul-encoding.s.cs2 0xb1,0x09,0x40,0xf2 = vmul.i8 d16, d16, d17
3 0xb1,0x09,0x50,0xf2 = vmul.i16 d16, d16, d17
4 0xb1,0x09,0x60,0xf2 = vmul.i32 d16, d16, d17
5 0xb1,0x0d,0x40,0xf3 = vmul.f32 d16, d16, d17
6 0xf2,0x09,0x40,0xf2 = vmul.i8 q8, q8, q9
7 0xf2,0x09,0x50,0xf2 = vmul.i16 q8, q8, q9
8 0xf2,0x09,0x60,0xf2 = vmul.i32 q8, q8, q9
9 0xf2,0x0d,0x40,0xf3 = vmul.f32 q8, q8, q9
10 0xb1,0x09,0x40,0xf3 = vmul.p8 d16, d16, d17
11 0xf2,0x09,0x40,0xf3 = vmul.p8 q8, q8, q9
[all …]
Dneont2-add-encoding.s.cs2 0x41,0xef,0xa0,0x08 = vadd.i8 d16, d17, d16
3 0x51,0xef,0xa0,0x08 = vadd.i16 d16, d17, d16
4 0x71,0xef,0xa0,0x08 = vadd.i64 d16, d17, d16
5 0x61,0xef,0xa0,0x08 = vadd.i32 d16, d17, d16
6 0x40,0xef,0xa1,0x0d = vadd.f32 d16, d16, d17
7 0x40,0xef,0xe2,0x0d = vadd.f32 q8, q8, q9
8 0xc1,0xef,0xa0,0x00 = vaddl.s8 q8, d17, d16
9 0xd1,0xef,0xa0,0x00 = vaddl.s16 q8, d17, d16
10 0xe1,0xef,0xa0,0x00 = vaddl.s32 q8, d17, d16
11 0xc1,0xff,0xa0,0x00 = vaddl.u8 q8, d17, d16
[all …]
Dneon-add-encoding.s.cs2 0xa0,0x08,0x41,0xf2 = vadd.i8 d16, d17, d16
3 0xa0,0x08,0x51,0xf2 = vadd.i16 d16, d17, d16
4 0xa0,0x08,0x71,0xf2 = vadd.i64 d16, d17, d16
5 0xa0,0x08,0x61,0xf2 = vadd.i32 d16, d17, d16
6 0xa1,0x0d,0x40,0xf2 = vadd.f32 d16, d16, d17
7 0xe2,0x0d,0x40,0xf2 = vadd.f32 q8, q8, q9
8 0xa0,0x00,0xc1,0xf2 = vaddl.s8 q8, d17, d16
9 0xa0,0x00,0xd1,0xf2 = vaddl.s16 q8, d17, d16
10 0xa0,0x00,0xe1,0xf2 = vaddl.s32 q8, d17, d16
11 0xa0,0x00,0xc1,0xf3 = vaddl.u8 q8, d17, d16
[all …]
Dneon-shift-encoding.s.cs2 0xa1,0x04,0x40,0xf3 = vshl.u8 d16, d17, d16
3 0xa1,0x04,0x50,0xf3 = vshl.u16 d16, d17, d16
4 0xa1,0x04,0x60,0xf3 = vshl.u32 d16, d17, d16
5 0xa1,0x04,0x70,0xf3 = vshl.u64 d16, d17, d16
6 0x30,0x05,0xcf,0xf2 = vshl.i8 d16, d16, #7
7 0x30,0x05,0xdf,0xf2 = vshl.i16 d16, d16, #15
8 0x30,0x05,0xff,0xf2 = vshl.i32 d16, d16, #31
9 0xb0,0x05,0xff,0xf2 = vshl.i64 d16, d16, #63
10 0xe2,0x04,0x40,0xf3 = vshl.u8 q8, q9, q8
11 0xe2,0x04,0x50,0xf3 = vshl.u16 q8, q9, q8
[all …]
/external/llvm/test/MC/ARM/
Dneont2-mul-encoding.s17 @ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09]
18 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09]
19 @ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
20 @ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d]
21 @ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09]
22 @ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09]
23 @ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
24 @ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d]
25 @ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09]
26 @ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09]
[all …]
Dneont2-absdiff-encoding.s20 @ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x07]
21 @ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x07]
22 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x07]
23 @ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x07]
24 @ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x07]
25 @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x07]
26 @ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0d]
27 @ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x07]
28 @ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x07]
29 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x07]
[all …]
Dneon-absdiff-encoding.s3 @ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf2]
5 @ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf2]
7 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf2]
9 @ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf3]
11 @ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf3]
13 @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf3]
15 @ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf3]
17 @ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf2]
19 @ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf2]
21 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf2]
[all …]
Dneon-pairwise-encoding.s3 @ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2]
5 @ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xf2]
7 @ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xf2]
9 @ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3]
12 @ CHECK: vpadd.i8 d17, d17, d16 @ encoding: [0xb0,0x1b,0x41,0xf2]
14 @ CHECK: vpadd.i16 d17, d17, d16 @ encoding: [0xb0,0x1b,0x51,0xf2]
16 @ CHECK: vpadd.i32 d17, d17, d16 @ encoding: [0xb0,0x1b,0x61,0xf2]
18 @ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3]
21 @ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xf3]
23 @ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xf3]
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dneont2-mul-encoding.s17 @ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09]
18 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09]
19 @ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
20 @ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d]
21 @ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09]
22 @ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09]
23 @ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
24 @ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d]
25 @ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09]
26 @ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09]
[all …]
Dneon-absdiff-encoding.s3 @ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf2]
5 @ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf2]
7 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf2]
9 @ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf3]
11 @ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf3]
13 @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf3]
15 @ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf3]
17 @ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf2]
19 @ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf2]
21 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf2]
[all …]
Dneont2-absdiff-encoding.s20 @ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x07]
21 @ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x07]
22 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x07]
23 @ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x07]
24 @ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x07]
25 @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x07]
26 @ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0d]
27 @ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x07]
28 @ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x07]
29 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x07]
[all …]
Dneon-pairwise-encoding.s3 @ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2]
5 @ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xf2]
7 @ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xf2]
9 @ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3]
12 @ CHECK: vpadd.i8 d17, d17, d16 @ encoding: [0xb0,0x1b,0x41,0xf2]
14 @ CHECK: vpadd.i16 d17, d17, d16 @ encoding: [0xb0,0x1b,0x51,0xf2]
16 @ CHECK: vpadd.i32 d17, d17, d16 @ encoding: [0xb0,0x1b,0x61,0xf2]
18 @ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3]
21 @ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xf3]
23 @ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xf3]
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-simd-misc.s.cs1 # CS_ARCH_ARM64, 0, None
2 0xe0,0x0b,0x20,0x4e = rev64 v0.16b, v31.16b
3 0x82,0x08,0x60,0x4e = rev64 v2.8h, v4.8h
4 0x06,0x09,0xa0,0x4e = rev64 v6.4s, v8.4s
5 0x21,0x09,0x20,0x0e = rev64 v1.8b, v9.8b
6 0xad,0x0a,0x60,0x0e = rev64 v13.4h, v21.4h
7 0x04,0x08,0xa0,0x0e = rev64 v4.2s, v0.2s
8 0xfe,0x0b,0x20,0x6e = rev32 v30.16b, v31.16b
9 0xe4,0x08,0x60,0x6e = rev32 v4.8h, v7.8h
10 0x35,0x08,0x20,0x2e = rev32 v21.8b, v1.8b
[all …]

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