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/external/vixl/test/aarch32/traces/
Dassembler-cond-rd-operand-rn-movs-a32.h38 0x02, 0xd0, 0xb0, 0xb1 // movs lt r13 r2
41 0x09, 0x20, 0xb0, 0x21 // movs cs r2 r9
44 0x01, 0xc0, 0xb0, 0x11 // movs ne r12 r1
47 0x01, 0x00, 0xb0, 0x31 // movs cc r0 r1
50 0x00, 0x60, 0xb0, 0x51 // movs pl r6 r0
53 0x06, 0x10, 0xb0, 0x51 // movs pl r1 r6
56 0x04, 0xa0, 0xb0, 0x61 // movs vs r10 r4
59 0x04, 0xa0, 0xb0, 0x41 // movs mi r10 r4
62 0x03, 0xc0, 0xb0, 0xa1 // movs ge r12 r3
65 0x00, 0x20, 0xb0, 0xb1 // movs lt r2 r0
[all …]
Dassembler-cond-rd-rn-rrxs-a32.h38 0x61, 0xc0, 0xb0, 0x21 // rrxs cs r12 r1
41 0x6c, 0x60, 0xb0, 0x81 // rrxs hi r6 r12
44 0x6a, 0xb0, 0xb0, 0xb1 // rrxs lt r11 r10
47 0x68, 0xa0, 0xb0, 0x61 // rrxs vs r10 r8
50 0x68, 0x50, 0xb0, 0x51 // rrxs pl r5 r8
53 0x6e, 0xe0, 0xb0, 0x91 // rrxs ls r14 r14
56 0x66, 0x80, 0xb0, 0xc1 // rrxs gt r8 r6
59 0x6b, 0x70, 0xb0, 0x71 // rrxs vc r7 r11
62 0x6c, 0x40, 0xb0, 0x51 // rrxs pl r4 r12
65 0x6c, 0xc0, 0xb0, 0xc1 // rrxs gt r12 r12
[all …]
Dassembler-cond-rd-operand-rn-shift-rs-movs-a32.h38 0x1b, 0xdc, 0xb0, 0xc1 // movs gt r13 r11 LSL r12
41 0x34, 0xc6, 0xb0, 0xc1 // movs gt r12 r4 LSR r6
44 0x7d, 0xb2, 0xb0, 0xa1 // movs ge r11 r13 ROR r2
47 0x58, 0x9a, 0xb0, 0x81 // movs hi r9 r8 ASR r10
50 0x1a, 0x94, 0xb0, 0xe1 // movs al r9 r10 LSL r4
53 0x3b, 0x44, 0xb0, 0xc1 // movs gt r4 r11 LSR r4
56 0x56, 0x4b, 0xb0, 0x71 // movs vc r4 r6 ASR r11
59 0x3e, 0x99, 0xb0, 0x41 // movs mi r9 r14 LSR r9
62 0x3a, 0x58, 0xb0, 0x11 // movs ne r5 r10 LSR r8
65 0x70, 0x3b, 0xb0, 0x01 // movs eq r3 r0 ROR r11
[all …]
Dassembler-cond-rd-operand-rn-shift-amount-1to31-movs-a32.h38 0x65, 0x55, 0xb0, 0x71 // movs vc r5 r5 ROR 10
41 0xe4, 0x38, 0xb0, 0x11 // movs ne r3 r4 ROR 17
44 0x6a, 0x98, 0xb0, 0x21 // movs cs r9 r10 ROR 16
47 0xe2, 0x0e, 0xb0, 0xb1 // movs lt r0 r2 ROR 29
50 0xe2, 0xbb, 0xb0, 0xe1 // movs al r11 r2 ROR 23
53 0x81, 0x7e, 0xb0, 0x81 // movs hi r7 r1 LSL 29
56 0xe3, 0x5a, 0xb0, 0x01 // movs eq r5 r3 ROR 21
59 0xea, 0x26, 0xb0, 0x51 // movs pl r2 r10 ROR 13
62 0x81, 0x1b, 0xb0, 0xb1 // movs lt r1 r1 LSL 23
65 0xea, 0xbf, 0xb0, 0x41 // movs mi r11 r10 ROR 31
[all …]
Dassembler-cond-rd-operand-rn-shift-amount-1to32-movs-a32.h38 0xad, 0xab, 0xb0, 0x01 // movs eq r10 r13 LSR 23
41 0xad, 0xc6, 0xb0, 0x01 // movs eq r12 r13 LSR 13
44 0x25, 0xd6, 0xb0, 0x51 // movs pl r13 r5 LSR 12
47 0xcb, 0x86, 0xb0, 0x71 // movs vc r8 r11 ASR 13
50 0xcc, 0x90, 0xb0, 0xe1 // movs al r9 r12 ASR 1
53 0xc3, 0xaf, 0xb0, 0x61 // movs vs r10 r3 ASR 31
56 0x4b, 0x27, 0xb0, 0x51 // movs pl r2 r11 ASR 14
59 0xaa, 0xbd, 0xb0, 0xe1 // movs al r11 r10 LSR 27
62 0xa8, 0xa9, 0xb0, 0xd1 // movs le r10 r8 LSR 19
65 0xc2, 0x64, 0xb0, 0x71 // movs vc r6 r2 ASR 9
[all …]
Dassembler-cond-rd-rn-operand-rm-asrs-a32.h38 0x55, 0x4e, 0xb0, 0xd1 // asrs le r4 r5 r14
41 0x5b, 0x5a, 0xb0, 0xa1 // asrs ge r5 r11 r10
44 0x59, 0x09, 0xb0, 0x91 // asrs ls r0 r9 r9
47 0x57, 0x82, 0xb0, 0xd1 // asrs le r8 r7 r2
50 0x5a, 0x1d, 0xb0, 0x01 // asrs eq r1 r10 r13
53 0x5c, 0x92, 0xb0, 0xd1 // asrs le r9 r12 r2
56 0x51, 0x65, 0xb0, 0x51 // asrs pl r6 r1 r5
59 0x5c, 0x16, 0xb0, 0xa1 // asrs ge r1 r12 r6
62 0x5c, 0xd3, 0xb0, 0x31 // asrs cc r13 r12 r3
65 0x54, 0x29, 0xb0, 0xc1 // asrs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-lsls-a32.h38 0x15, 0x4e, 0xb0, 0xd1 // lsls le r4 r5 r14
41 0x1b, 0x5a, 0xb0, 0xa1 // lsls ge r5 r11 r10
44 0x19, 0x09, 0xb0, 0x91 // lsls ls r0 r9 r9
47 0x17, 0x82, 0xb0, 0xd1 // lsls le r8 r7 r2
50 0x1a, 0x1d, 0xb0, 0x01 // lsls eq r1 r10 r13
53 0x1c, 0x92, 0xb0, 0xd1 // lsls le r9 r12 r2
56 0x11, 0x65, 0xb0, 0x51 // lsls pl r6 r1 r5
59 0x1c, 0x16, 0xb0, 0xa1 // lsls ge r1 r12 r6
62 0x1c, 0xd3, 0xb0, 0x31 // lsls cc r13 r12 r3
65 0x14, 0x29, 0xb0, 0xc1 // lsls gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-lsrs-a32.h38 0x35, 0x4e, 0xb0, 0xd1 // lsrs le r4 r5 r14
41 0x3b, 0x5a, 0xb0, 0xa1 // lsrs ge r5 r11 r10
44 0x39, 0x09, 0xb0, 0x91 // lsrs ls r0 r9 r9
47 0x37, 0x82, 0xb0, 0xd1 // lsrs le r8 r7 r2
50 0x3a, 0x1d, 0xb0, 0x01 // lsrs eq r1 r10 r13
53 0x3c, 0x92, 0xb0, 0xd1 // lsrs le r9 r12 r2
56 0x31, 0x65, 0xb0, 0x51 // lsrs pl r6 r1 r5
59 0x3c, 0x16, 0xb0, 0xa1 // lsrs ge r1 r12 r6
62 0x3c, 0xd3, 0xb0, 0x31 // lsrs cc r13 r12 r3
65 0x34, 0x29, 0xb0, 0xc1 // lsrs gt r2 r4 r9
[all …]
Dassembler-cond-rd-rn-operand-rm-rors-a32.h38 0x75, 0x4e, 0xb0, 0xd1 // rors le r4 r5 r14
41 0x7b, 0x5a, 0xb0, 0xa1 // rors ge r5 r11 r10
44 0x79, 0x09, 0xb0, 0x91 // rors ls r0 r9 r9
47 0x77, 0x82, 0xb0, 0xd1 // rors le r8 r7 r2
50 0x7a, 0x1d, 0xb0, 0x01 // rors eq r1 r10 r13
53 0x7c, 0x92, 0xb0, 0xd1 // rors le r9 r12 r2
56 0x71, 0x65, 0xb0, 0x51 // rors pl r6 r1 r5
59 0x7c, 0x16, 0xb0, 0xa1 // rors ge r1 r12 r6
62 0x7c, 0xd3, 0xb0, 0x31 // rors cc r13 r12 r3
65 0x74, 0x29, 0xb0, 0xc1 // rors gt r2 r4 r9
[all …]
Dassembler-cond-rd-operand-const-cannot-use-pc-movs-a32.h38 0xff, 0x09, 0xb0, 0x93 // movs ls r0 0x003fc000
41 0xff, 0xd4, 0xb0, 0x03 // movs eq r13 0xff000000
44 0xab, 0x0b, 0xb0, 0xe3 // movs al r0 0x0002ac00
47 0xab, 0xd9, 0xb0, 0xc3 // movs gt r13 0x002ac000
50 0xab, 0x3f, 0xb0, 0x43 // movs mi r3 0x000002ac
53 0xff, 0x00, 0xb0, 0x93 // movs ls r0 0x000000ff
56 0xab, 0x7c, 0xb0, 0x93 // movs ls r7 0x0000ab00
59 0xff, 0xb6, 0xb0, 0x33 // movs cc r11 0x0ff00000
62 0xff, 0x51, 0xb0, 0x63 // movs vs r5 0xc000003f
65 0xab, 0x38, 0xb0, 0xc3 // movs gt r3 0x00ab0000
[all …]
Dassembler-cond-sp-sp-operand-imm7-sub-t32.h38 0x80, 0xb0 // sub al sp sp 0x0
41 0x81, 0xb0 // sub al sp sp 0x4
44 0x82, 0xb0 // sub al sp sp 0x8
47 0x83, 0xb0 // sub al sp sp 0xc
50 0x84, 0xb0 // sub al sp sp 0x10
53 0x85, 0xb0 // sub al sp sp 0x14
56 0x86, 0xb0 // sub al sp sp 0x18
59 0x87, 0xb0 // sub al sp sp 0x1c
62 0x88, 0xb0 // sub al sp sp 0x20
65 0x89, 0xb0 // sub al sp sp 0x24
[all …]
Dassembler-cond-sp-sp-operand-imm7-add-t32.h38 0x00, 0xb0 // add al sp sp 0x0
41 0x01, 0xb0 // add al sp sp 0x4
44 0x02, 0xb0 // add al sp sp 0x8
47 0x03, 0xb0 // add al sp sp 0xc
50 0x04, 0xb0 // add al sp sp 0x10
53 0x05, 0xb0 // add al sp sp 0x14
56 0x06, 0xb0 // add al sp sp 0x18
59 0x07, 0xb0 // add al sp sp 0x1c
62 0x08, 0xb0 // add al sp sp 0x20
65 0x09, 0xb0 // add al sp sp 0x24
[all …]
/external/boringssl/ios-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
25 .long 0x01,0x01,0x01,0x01
26 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
27 .long 0x1b,0x1b,0x1b,0x1b
40 cmp r0,#0
42 cmp r2,#0
49 tst r1,#0x3f
70 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
89 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
104 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/openscreen/third_party/boringssl/ios-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
25 .long 0x01,0x01,0x01,0x01
26 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
27 .long 0x1b,0x1b,0x1b,0x1b
40 cmp r0,#0
42 cmp r2,#0
49 tst r1,#0x3f
70 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
89 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
104 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/rust/crates/quiche/deps/boringssl/ios-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
25 .long 0x01,0x01,0x01,0x01
26 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
27 .long 0x1b,0x1b,0x1b,0x1b
40 cmp r0,#0
42 cmp r2,#0
49 tst r1,#0x3f
70 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
89 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
104 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/rust/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
26 .long 0x01,0x01,0x01,0x01
27 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
28 .long 0x1b,0x1b,0x1b,0x1b
39 cmp r0,#0
41 cmp r2,#0
48 tst r1,#0x3f
69 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
88 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
103 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/boringssl/linux-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
26 .long 0x01,0x01,0x01,0x01
27 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
28 .long 0x1b,0x1b,0x1b,0x1b
39 cmp r0,#0
41 cmp r2,#0
48 tst r1,#0x3f
69 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
88 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
103 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/openscreen/third_party/boringssl/linux-arm/crypto/fipsmodule/
Daesv8-armx32.S5 #define __has_feature(x) 0
26 .long 0x01,0x01,0x01,0x01
27 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
28 .long 0x1b,0x1b,0x1b,0x1b
39 cmp r0,#0
41 cmp r2,#0
48 tst r1,#0x3f
69 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
88 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
103 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/rust/crates/ring/pregenerated/
Daesv8-armx-ios32.S5 #define __has_feature(x) 0
22 .long 0x01,0x01,0x01,0x01
23 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
24 .long 0x1b,0x1b,0x1b,0x1b
37 cmp r0,#0
39 cmp r2,#0
46 tst r1,#0x3f
67 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
86 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
101 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
Daesv8-armx-linux32.S5 #define __has_feature(x) 0
23 .long 0x01,0x01,0x01,0x01
24 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
25 .long 0x1b,0x1b,0x1b,0x1b
36 cmp r0,#0
38 cmp r2,#0
45 tst r1,#0x3f
66 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
85 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
100 .byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dmve-interleave.txt5 # CHECK: vld20.8 {q0, q1}, [r0] @ encoding: [0x90,0xfc,0x00,0x1e]
7 [0x90,0xfc,0x00,0x1e]
9 # CHECK: vld20.8 {q0, q1}, [r0]! @ encoding: [0xb0,0xfc,0x00,0x1e]
11 [0xb0,0xfc,0x00,0x1e]
13 # CHECK: vld20.8 {q0, q1}, [r11] @ encoding: [0x9b,0xfc,0x00,0x1e]
15 [0x9b,0xfc,0x00,0x1e]
17 # CHECK: vld20.8 {q5, q6}, [r0]! @ encoding: [0xb0,0xfc,0x00,0xbe]
19 [0xb0,0xfc,0x00,0xbe]
21 # CHECK: vld21.8 {q0, q1}, [r0] @ encoding: [0x90,0xfc,0x20,0x1e]
23 [0x90,0xfc,0x20,0x1e]
[all …]
/external/capstone/suite/MC/ARM/
Dneon-mov-encoding.s.cs2 0x18,0x0e,0xc0,0xf2 = vmov.i8 d16, #0x8
3 0x10,0x08,0xc1,0xf2 = vmov.i16 d16, #0x10
4 0x10,0x0a,0xc1,0xf2 = vmov.i16 d16, #0x1000
5 0x10,0x00,0xc2,0xf2 = vmov.i32 d16, #0x20
6 0x10,0x02,0xc2,0xf2 = vmov.i32 d16, #0x2000
7 0x10,0x04,0xc2,0xf2 = vmov.i32 d16, #0x200000
8 0x10,0x06,0xc2,0xf2 = vmov.i32 d16, #0x20000000
9 0x10,0x0c,0xc2,0xf2 = vmov.i32 d16, #0x20ff
10 0x10,0x0d,0xc2,0xf2 = vmov.i32 d16, #0x20ffff
11 0x33,0x0e,0xc1,0xf3 = vmov.i64 d16, #0xff0000ff0000ffff
[all …]
Dneont2-satshift-encoding.s.cs2 0x41,0xef,0xb0,0x04 = vqshl.s8 d16, d16, d17
3 0x51,0xef,0xb0,0x04 = vqshl.s16 d16, d16, d17
4 0x61,0xef,0xb0,0x04 = vqshl.s32 d16, d16, d17
5 0x71,0xef,0xb0,0x04 = vqshl.s64 d16, d16, d17
6 0x41,0xff,0xb0,0x04 = vqshl.u8 d16, d16, d17
7 0x51,0xff,0xb0,0x04 = vqshl.u16 d16, d16, d17
8 0x61,0xff,0xb0,0x04 = vqshl.u32 d16, d16, d17
9 0x71,0xff,0xb0,0x04 = vqshl.u64 d16, d16, d17
10 0x42,0xef,0xf0,0x04 = vqshl.s8 q8, q8, q9
11 0x52,0xef,0xf0,0x04 = vqshl.s16 q8, q8, q9
[all …]
Dneon-satshift-encoding.s.cs2 0xb0,0x04,0x41,0xf2 = vqshl.s8 d16, d16, d17
3 0xb0,0x04,0x51,0xf2 = vqshl.s16 d16, d16, d17
4 0xb0,0x04,0x61,0xf2 = vqshl.s32 d16, d16, d17
5 0xb0,0x04,0x71,0xf2 = vqshl.s64 d16, d16, d17
6 0xb0,0x04,0x41,0xf3 = vqshl.u8 d16, d16, d17
7 0xb0,0x04,0x51,0xf3 = vqshl.u16 d16, d16, d17
8 0xb0,0x04,0x61,0xf3 = vqshl.u32 d16, d16, d17
9 0xb0,0x04,0x71,0xf3 = vqshl.u64 d16, d16, d17
10 0xf0,0x04,0x42,0xf2 = vqshl.s8 q8, q8, q9
11 0xf0,0x04,0x52,0xf2 = vqshl.s16 q8, q8, q9
[all …]
/external/llvm-project/llvm/test/MC/AArch64/SVE/
Ddecw.s12 // CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
18 // CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
24 // CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
30 // CHECK-ENCODING: [0xe0,0xe7,0xbf,0x04]
36 // CHECK-ENCODING: [0x00,0xe4,0xb0,0x04]
42 // CHECK-ENCODING: [0x20,0xe4,0xb0,0x04]
48 // CHECK-ENCODING: [0x40,0xe4,0xb0,0x04]
54 // CHECK-ENCODING: [0x60,0xe4,0xb0,0x04]
60 // CHECK-ENCODING: [0x80,0xe4,0xb0,0x04]
66 // CHECK-ENCODING: [0xa0,0xe4,0xb0,0x04]
[all …]

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