/external/llvm-project/llvm/test/MC/Sparc/ |
D | sparc-v9-traps.s | 3 ! CHECK: ta %icc, %i5 ! encoding: [0x91,0xd0,0x00,0x1d] 4 ! CHECK: ta %icc, 82 ! encoding: [0x91,0xd0,0x20,0x52] 5 ! CHECK: ta %icc, %g1 + %i2 ! encoding: [0x91,0xd0,0x40,0x1a] 6 ! CHECK: ta %icc, %i5 + 41 ! encoding: [0x91,0xd7,0x60,0x29] 12 ! CHECK: tn %icc, %i5 ! encoding: [0x81,0xd0,0x00,0x1d] 13 ! CHECK: tn %icc, 82 ! encoding: [0x81,0xd0,0x20,0x52] 14 ! CHECK: tn %icc, %g1 + %i2 ! encoding: [0x81,0xd0,0x40,0x1a] 15 ! CHECK: tn %icc, %i5 + 41 ! encoding: [0x81,0xd7,0x60,0x29] 21 ! CHECK: tne %icc, %i5 ! encoding: [0x93,0xd0,0x00,0x1d] 23 ! CHECK: tne %icc, %i5 ! encoding: [0x93,0xd0,0x00,0x1d] [all …]
|
D | sparc-traps.s | 3 ! CHECK: ta %i5 ! encoding: [0x91,0xd0,0x00,0x1d] 4 ! CHECK: ta 82 ! encoding: [0x91,0xd0,0x20,0x52] 5 ! CHECK: ta %g1 + %i2 ! encoding: [0x91,0xd0,0x40,0x1a] 6 ! CHECK: ta %i5 + 41 ! encoding: [0x91,0xd7,0x60,0x29] 12 ! CHECK: tn %i5 ! encoding: [0x81,0xd0,0x00,0x1d] 13 ! CHECK: tn 82 ! encoding: [0x81,0xd0,0x20,0x52] 14 ! CHECK: tn %g1 + %i2 ! encoding: [0x81,0xd0,0x40,0x1a] 15 ! CHECK: tn %i5 + 41 ! encoding: [0x81,0xd7,0x60,0x29] 21 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d] 23 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d] [all …]
|
/external/llvm/test/MC/Sparc/ |
D | sparc-v9-traps.s | 3 ! CHECK: ta %icc, %i5 ! encoding: [0x91,0xd0,0x00,0x1d] 4 ! CHECK: ta %icc, 82 ! encoding: [0x91,0xd0,0x20,0x52] 5 ! CHECK: ta %icc, %g1 + %i2 ! encoding: [0x91,0xd0,0x40,0x1a] 6 ! CHECK: ta %icc, %i5 + 41 ! encoding: [0x91,0xd7,0x60,0x29] 12 ! CHECK: tn %icc, %i5 ! encoding: [0x81,0xd0,0x00,0x1d] 13 ! CHECK: tn %icc, 82 ! encoding: [0x81,0xd0,0x20,0x52] 14 ! CHECK: tn %icc, %g1 + %i2 ! encoding: [0x81,0xd0,0x40,0x1a] 15 ! CHECK: tn %icc, %i5 + 41 ! encoding: [0x81,0xd7,0x60,0x29] 21 ! CHECK: tne %icc, %i5 ! encoding: [0x93,0xd0,0x00,0x1d] 23 ! CHECK: tne %icc, %i5 ! encoding: [0x93,0xd0,0x00,0x1d] [all …]
|
D | sparc-traps.s | 3 ! CHECK: ta %i5 ! encoding: [0x91,0xd0,0x00,0x1d] 4 ! CHECK: ta 82 ! encoding: [0x91,0xd0,0x20,0x52] 5 ! CHECK: ta %g1 + %i2 ! encoding: [0x91,0xd0,0x40,0x1a] 6 ! CHECK: ta %i5 + 41 ! encoding: [0x91,0xd7,0x60,0x29] 12 ! CHECK: tn %i5 ! encoding: [0x81,0xd0,0x00,0x1d] 13 ! CHECK: tn 82 ! encoding: [0x81,0xd0,0x20,0x52] 14 ! CHECK: tn %g1 + %i2 ! encoding: [0x81,0xd0,0x40,0x1a] 15 ! CHECK: tn %i5 + 41 ! encoding: [0x81,0xd7,0x60,0x29] 21 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d] 23 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d] [all …]
|
/external/llvm/test/MC/Disassembler/Sparc/ |
D | sparc-v9.txt | 4 0x85 0x70 0x00 0x01 7 0x91 0xd0 0x00 0x1d 10 0x91 0xd0 0x20 0x52 13 0x91 0xd0 0x40 0x1a 16 0x91 0xd7 0x60 0x29 19 0x81 0xd0 0x00 0x1d 22 0x93 0xd0 0x20 0x52 25 0x83 0xd0 0x40 0x1a 28 0x95 0xd7 0x60 0x29 31 0x85 0xd0 0x00 0x1d [all …]
|
D | sparc.txt | 4 0x80 0x00 0x00 0x00 7 0x86 0x00 0x40 0x02 10 0xa0 0x02 0x00 0x09 13 0xa0 0x02 0x20 0x0a 16 0x86 0x80 0x40 0x02 19 0x86 0xc0 0x40 0x02 22 0x86 0x70 0x40 0x02 25 0x86 0x78 0x40 0x02 28 0x86 0x08 0x40 0x02 31 0x86 0x28 0x40 0x02 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/Sparc/ |
D | sparc-v9.txt | 4 0x85 0x70 0x00 0x01 7 0x91 0xd0 0x00 0x1d 10 0x91 0xd0 0x20 0x52 13 0x91 0xd0 0x40 0x1a 16 0x91 0xd7 0x60 0x29 19 0x81 0xd0 0x00 0x1d 22 0x93 0xd0 0x20 0x52 25 0x83 0xd0 0x40 0x1a 28 0x95 0xd7 0x60 0x29 31 0x85 0xd0 0x00 0x1d [all …]
|
D | sparc.txt | 4 0x80 0x00 0x00 0x00 7 0x86 0x00 0x40 0x02 10 0xa0 0x02 0x00 0x09 13 0xa0 0x02 0x20 0x0a 16 0x86 0x80 0x40 0x02 19 0x86 0xc0 0x40 0x02 22 0x86 0x70 0x40 0x02 25 0x86 0x78 0x40 0x02 28 0x86 0x08 0x40 0x02 31 0x86 0x28 0x40 0x02 [all …]
|
/external/llvm-project/llvm/test/MC/AArch64/SVE/ |
D | fmov.s | 11 // CHECK-INST: mov z0.h, #0 12 // CHECK-ENCODING: [0x00,0xc0,0x78,0x25] 17 // CHECK-INST: mov z0.s, #0 18 // CHECK-ENCODING: [0x00,0xc0,0xb8,0x25] 23 // CHECK-INST: mov z0.d, #0 24 // CHECK-ENCODING: [0x00,0xc0,0xf8,0x25] 30 // CHECK-ENCODING: [0x00,0xd8,0x79,0x25] 36 // CHECK-ENCODING: [0x00,0xd8,0xb9,0x25] 42 // CHECK-ENCODING: [0x00,0xd8,0xf9,0x25] 48 // CHECK-ENCODING: [0xe0,0xc7,0xf9,0x25] [all …]
|
D | fcpy.s | 12 // CHECK-ENCODING: [0x00,0xd8,0x50,0x05] 18 // CHECK-ENCODING: [0x00,0xd8,0x90,0x05] 24 // CHECK-ENCODING: [0x00,0xd8,0xd0,0x05] 30 // CHECK-ENCODING: [0x20,0xd8,0xd0,0x05] 36 // CHECK-ENCODING: [0x40,0xd8,0xd0,0x05] 42 // CHECK-ENCODING: [0x60,0xd8,0xd0,0x05] 48 // CHECK-ENCODING: [0x80,0xd8,0xd0,0x05] 54 // CHECK-ENCODING: [0xa0,0xd8,0xd0,0x05] 60 // CHECK-ENCODING: [0xc0,0xd8,0xd0,0x05] 66 // CHECK-ENCODING: [0xe0,0xd8,0xd0,0x05] [all …]
|
/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | vop3_vi.txt | 3 # VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40] 4 0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x40 6 # VI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00] 7 0x6a 0x00 0x41 0xd0 0x04 0x0d 0x02 0x00 9 # VI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x20] 10 0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x20 12 # VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40] 13 0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x40 15 # VI: v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x60] 16 0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x60 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | gfx8_dasm_all.txt | 3 # CHECK: ds_add_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x… 4 0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00 6 # CHECK: ds_add_u32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0xff,0x02,0x00,0x… 7 0xff,0xff,0x00,0xd8,0xff,0x02,0x00,0x00 9 # CHECK: ds_add_u32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0xff,0x00,0x… 10 0xff,0xff,0x00,0xd8,0x01,0xff,0x00,0x00 12 # CHECK: ds_add_u32 v1, v2 ; encoding: [0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x… 13 0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x00 15 # CHECK: ds_add_u32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x00,0xd8,0x01,0x02,0x00,0x… 16 0x04,0x00,0x00,0xd8,0x01,0x02,0x00,0x00 [all …]
|
D | gfx9_dasm_all.txt | 3 # CHECK: ds_add_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x… 4 0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00 6 # CHECK: ds_add_u32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0xff,0x02,0x00,0x… 7 0xff,0xff,0x00,0xd8,0xff,0x02,0x00,0x00 9 # CHECK: ds_add_u32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x00,0xd8,0x01,0xff,0x00,0x… 10 0xff,0xff,0x00,0xd8,0x01,0xff,0x00,0x00 12 # CHECK: ds_add_u32 v1, v2 ; encoding: [0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x… 13 0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x00 15 # CHECK: ds_add_u32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x00,0xd8,0x01,0x02,0x00,0x… 16 0x04,0x00,0x00,0xd8,0x01,0x02,0x00,0x00 [all …]
|
/external/llvm/test/MC/Disassembler/X86/ |
D | x86-16.txt | 4 0x66 0xbb 0x78 0x56 0x34 0x12 7 0xf3 0x90 10 0x0f 0xae 0xf8 13 0x0f 0xae 0xe8 16 0x0f 0xae 0xf0 19 0x0f 0x01 0xdc 22 0x0f 0x01 0xdd 25 0x0f 0x01 0xf9 28 0x67 0x66 0x89 0x45 0x10 31 0x67 0x66 0x89 0x45 0xf0 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/X86/ |
D | x86-16.txt | 4 0x66 0xbb 0x78 0x56 0x34 0x12 7 0xf3 0x90 10 0x0f 0xae 0xf8 13 0x0f 0xae 0xe8 16 0x0f 0xae 0xf0 19 0x0f 0x01 0xdc 22 0x0f 0x01 0xdd 25 0x0f 0x01 0xf9 28 0x67 0x66 0x89 0x45 0x10 31 0x67 0x66 0x89 0x45 0xf0 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.5a-specrestrict.txt | 5 [0x81 0x03 0x38 0xd5] 10 [0xe8 0xd0 0x3b 0xd5] 11 [0xe7 0xd0 0x38 0xd5] 12 [0xe6 0xd0 0x3c 0xd5] 13 [0xe5 0xd0 0x3e 0xd5] 14 [0xe4 0xd0 0x3d 0xd5] 27 [0xe8 0xd0 0x1b 0xd5] 28 [0xe7 0xd0 0x18 0xd5] 29 [0xe6 0xd0 0x1c 0xd5] 30 [0xe5 0xd0 0x1e 0xd5] [all …]
|
/external/vixl/test/aarch32/traces/ |
D | assembler-cond-rd-memop-immediate-512-ldrsb-a32.h | 38 0xd0, 0xd0, 0xd0, 0x51 // ldrsb pl r13 r0 plus 0 Offset 41 0xd0, 0x50, 0xd3, 0xa1 // ldrsb ge r5 r3 plus 0 Offset 44 0xd0, 0x00, 0xd4, 0x31 // ldrsb cc r0 r4 plus 0 Offset 47 0xd0, 0x00, 0xd0, 0xa1 // ldrsb ge r0 r0 plus 0 Offset 50 0xd0, 0xc0, 0xd3, 0x01 // ldrsb eq r12 r3 plus 0 Offset 53 0xd0, 0x40, 0xdd, 0xe1 // ldrsb al r4 r13 plus 0 Offset 56 0xd0, 0x80, 0xd2, 0x41 // ldrsb mi r8 r2 plus 0 Offset 59 0xd0, 0x60, 0xd9, 0x41 // ldrsb mi r6 r9 plus 0 Offset 62 0xd0, 0xd0, 0xdb, 0xc1 // ldrsb gt r13 r11 plus 0 Offset 65 0xd0, 0x00, 0xd7, 0x21 // ldrsb cs r0 r7 plus 0 Offset [all …]
|
D | assembler-cond-rd-rn-operand-rm-sbcs-a32.h | 38 0x0e, 0x40, 0xd5, 0xd0 // sbcs le r4 r5 r14 41 0x0a, 0x50, 0xdb, 0xa0 // sbcs ge r5 r11 r10 44 0x09, 0x00, 0xd9, 0x90 // sbcs ls r0 r9 r9 47 0x02, 0x80, 0xd7, 0xd0 // sbcs le r8 r7 r2 50 0x0d, 0x10, 0xda, 0x00 // sbcs eq r1 r10 r13 53 0x02, 0x90, 0xdc, 0xd0 // sbcs le r9 r12 r2 56 0x05, 0x60, 0xd1, 0x50 // sbcs pl r6 r1 r5 59 0x06, 0x10, 0xdc, 0xa0 // sbcs ge r1 r12 r6 62 0x03, 0xd0, 0xdc, 0x30 // sbcs cc r13 r12 r3 65 0x09, 0x20, 0xd4, 0xc0 // sbcs gt r2 r4 r9 [all …]
|
/external/llvm-project/llvm/test/MC/AArch64/ |
D | armv8.5a-specrestrict.s | 7 // CHECK: mrs x9, {{id_pfr2_el1|ID_PFR2_EL1}} // encoding: [0x89,0x03,0x38,0xd5] 17 // CHECK: mrs x8, {{scxtnum_el0|SCXTNUM_EL0}} // encoding: [0xe8,0xd0,0x3b,0xd5] 18 // CHECK: mrs x7, {{scxtnum_el1|SCXTNUM_EL1}} // encoding: [0xe7,0xd0,0x38,0xd5] 19 // CHECK: mrs x6, {{scxtnum_el2|SCXTNUM_EL2}} // encoding: [0xe6,0xd0,0x3c,0xd5] 20 // CHECK: mrs x5, {{scxtnum_el3|SCXTNUM_EL3}} // encoding: [0xe5,0xd0,0x3e,0xd5] 21 // CHECK: mrs x4, {{scxtnum_el12|SCXTNUM_EL12}} // encoding: [0xe4,0xd0,0x3d,0xd5] 39 // CHECK: msr {{scxtnum_el0|SCXTNUM_EL0}}, x8 // encoding: [0xe8,0xd0,0x1b,0xd5] 40 // CHECK: msr {{scxtnum_el1|SCXTNUM_EL1}}, x7 // encoding: [0xe7,0xd0,0x18,0xd5] 41 // CHECK: msr {{scxtnum_el2|SCXTNUM_EL2}}, x6 // encoding: [0xe6,0xd0,0x1c,0xd5] 42 // CHECK: msr {{scxtnum_el3|SCXTNUM_EL3}}, x5 // encoding: [0xe5,0xd0,0x1e,0xd5] [all …]
|
/external/llvm/test/MC/Disassembler/Hexagon/ |
D | xtype_complex.txt | 5 0x90 0xde 0x54 0xc1 7 0xd0 0xde 0x54 0xc1 9 0x10 0xde 0xd4 0xc1 11 0x50 0xde 0xd4 0xc1 15 0x10 0xde 0x54 0xc1 17 0x50 0xde 0x54 0xc1 21 0xd0 0xdf 0x15 0xe5 23 0xd0 0xdf 0x95 0xe5 25 0xd0 0xdf 0x55 0xe5 27 0xd0 0xdf 0xd5 0xe5 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/Hexagon/ |
D | xtype_complex.txt | 5 0x90 0xde 0x54 0xc1 7 0xd0 0xde 0x54 0xc1 9 0x10 0xde 0xd4 0xc1 11 0x50 0xde 0xd4 0xc1 15 0x10 0xde 0x54 0xc1 17 0x50 0xde 0x54 0xc1 21 0xd0 0xdf 0x15 0xe5 23 0xd0 0xdf 0x95 0xe5 25 0xd0 0xdf 0x55 0xe5 27 0xd0 0xdf 0xd5 0xe5 [all …]
|
/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | thumb2-diagnostic.txt | 7 0xd0 0xe8 0x0d 0xf0 9 # CHECK-V7-NEXT: 0xd0 0xe8 0x0d 0xf0 12 0xd0 0xe8 0x0f 0xf0 14 # CHECK-NEXT: 0xd0 0xe8 0x0f 0xf0 17 0xdd 0xe8 0x00 0xf0 19 # CHECK-V7-NEXT: 0xdd 0xe8 0x00 0xf0 22 0xdf 0xe8 0x00 0xf0 25 0xd0 0xe8 0x1d 0xf0 27 # CHECK-V7-NEXT: 0xd0 0xe8 0x1d 0xf0 30 0xd0 0xe8 0x1f 0xf0 [all …]
|
/external/llvm/test/MC/AMDGPU/ |
D | vop3.s | 14 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40] 15 // VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40] 20 // SICI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x02,0xd0,0x04,0x0d,0x02,0x00] 21 // VI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00] 28 // SICI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x20] 29 // VI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x20] 32 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40] 33 // VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40] 36 // SICI: v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x60] 37 // VI: v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x60] [all …]
|
/external/capstone/suite/MC/ARM/ |
D | arm-shift-encoding.s.cs | 2 0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] 3 0x20,0x00,0x90,0xe7 = ldr r0, [r0, r0, lsr #32] 4 0x20,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsr #16] 5 0x00,0x00,0x90,0xe7 = ldr r0, [r0, r0] 6 0x00,0x08,0x90,0xe7 = ldr r0, [r0, r0, lsl #16] 7 0x40,0x00,0x90,0xe7 = ldr r0, [r0, r0, asr #32] 8 0x40,0x08,0x90,0xe7 = ldr r0, [r0, r0, asr #16] 9 0x60,0x00,0x90,0xe7 = ldr r0, [r0, r0, rrx] 10 0x60,0x08,0x90,0xe7 = ldr r0, [r0, r0, ror #16] 11 0x00,0xf0,0xd0,0xf7 = pld [r0, r0] [all …]
|
/external/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/ |
D | get_weekday.pass.cpp | 40 explicit my_facet(const std::string& nm, std::size_t refs = 0) in my_facet() 46 std::ios ios(0); in main() 54 I i = f.get_weekday(I(in), I(in+sizeof(in)/sizeof(in[0])-1), ios, err, &t); in main() 55 assert(i.base() == in+sizeof(in)/sizeof(in[0])-1); in main() 64 I i = f.get_weekday(I(in), I(in+sizeof(in)/sizeof(in[0])-1), ios, err, &t); in main() 65 assert(i.base() == in+sizeof(in)/sizeof(in[0])-1); in main() 71 const char in[] = "\xD0\xBF\xD0\xBE\xD0\xBD\xD0\xB5" in main() 72 "\xD0\xB4\xD0\xB5\xD0\xBB\xD1\x8C" in main() 73 "\xD0\xBD\xD0\xB8\xD0\xBA"; in main() 76 I i = f.get_weekday(I(in), I(in+sizeof(in)/sizeof(in[0])-1), ios, err, &t); in main() [all …]
|