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/external/vixl/test/aarch32/traces/
Dassembler-cond-rd-operand-rn-uxtb-a32.h38 0x72, 0xd0, 0xef, 0xb6 // uxtb lt r13 r2
41 0x79, 0x20, 0xef, 0x26 // uxtb cs r2 r9
44 0x71, 0xc0, 0xef, 0x16 // uxtb ne r12 r1
47 0x71, 0x00, 0xef, 0x36 // uxtb cc r0 r1
50 0x70, 0x60, 0xef, 0x56 // uxtb pl r6 r0
53 0x76, 0x10, 0xef, 0x56 // uxtb pl r1 r6
56 0x74, 0xa0, 0xef, 0x66 // uxtb vs r10 r4
59 0x74, 0xa0, 0xef, 0x46 // uxtb mi r10 r4
62 0x73, 0xc0, 0xef, 0xa6 // uxtb ge r12 r3
65 0x70, 0x20, 0xef, 0xb6 // uxtb lt r2 r0
[all …]
Dassembler-cond-rd-operand-rn-ror-amount-uxtb-a32.h38 0x75, 0x20, 0xef, 0x76 // uxtb vc r2 r5 ROR 0
41 0x77, 0x50, 0xef, 0x06 // uxtb eq r5 r7 ROR 0
44 0x72, 0x34, 0xef, 0xa6 // uxtb ge r3 r2 ROR 8
47 0x73, 0xb8, 0xef, 0x36 // uxtb cc r11 r3 ROR 16
50 0x76, 0xd0, 0xef, 0x26 // uxtb cs r13 r6 ROR 0
53 0x77, 0x68, 0xef, 0xe6 // uxtb al r6 r7 ROR 16
56 0x7c, 0xc0, 0xef, 0xd6 // uxtb le r12 r12 ROR 0
59 0x75, 0x48, 0xef, 0x46 // uxtb mi r4 r5 ROR 16
62 0x72, 0x98, 0xef, 0x56 // uxtb pl r9 r2 ROR 16
65 0x7b, 0x54, 0xef, 0x66 // uxtb vs r5 r11 ROR 8
[all …]
Dassembler-cond-dt-drt-drd-drn-drm-float-f32-only-vmin-t32.h38 0x22, 0xef, 0x2e, 0x1f // vmin F32 d1 d2 d30
41 0x25, 0xef, 0x0d, 0xcf // vmin F32 d12 d5 d13
44 0x20, 0xef, 0x82, 0x3f // vmin F32 d3 d16 d2
47 0x6a, 0xef, 0x87, 0x5f // vmin F32 d21 d26 d7
50 0x61, 0xef, 0x20, 0xef // vmin F32 d30 d1 d16
53 0x68, 0xef, 0x06, 0x1f // vmin F32 d17 d8 d6
56 0x61, 0xef, 0x07, 0xaf // vmin F32 d26 d1 d7
59 0x66, 0xef, 0x2c, 0x1f // vmin F32 d17 d6 d28
62 0x66, 0xef, 0x2b, 0xef // vmin F32 d30 d6 d27
65 0x2d, 0xef, 0x0b, 0x6f // vmin F32 d6 d13 d11
[all …]
Dassembler-cond-dt-drt-drd-drn-drm-float-f32-only-vmax-t32.h38 0x02, 0xef, 0x2e, 0x1f // vmax F32 d1 d2 d30
41 0x05, 0xef, 0x0d, 0xcf // vmax F32 d12 d5 d13
44 0x00, 0xef, 0x82, 0x3f // vmax F32 d3 d16 d2
47 0x4a, 0xef, 0x87, 0x5f // vmax F32 d21 d26 d7
50 0x41, 0xef, 0x20, 0xef // vmax F32 d30 d1 d16
53 0x48, 0xef, 0x06, 0x1f // vmax F32 d17 d8 d6
56 0x41, 0xef, 0x07, 0xaf // vmax F32 d26 d1 d7
59 0x46, 0xef, 0x2c, 0x1f // vmax F32 d17 d6 d28
62 0x46, 0xef, 0x2b, 0xef // vmax F32 d30 d6 d27
65 0x0d, 0xef, 0x0b, 0x6f // vmax F32 d6 d13 d11
[all …]
Dassembler-cond-dt-drt-drd-drn-drm-float-f32-only-vceq-t32.h38 0x02, 0xef, 0x2e, 0x1e // vceq F32 d1 d2 d30
41 0x05, 0xef, 0x0d, 0xce // vceq F32 d12 d5 d13
44 0x00, 0xef, 0x82, 0x3e // vceq F32 d3 d16 d2
47 0x4a, 0xef, 0x87, 0x5e // vceq F32 d21 d26 d7
50 0x41, 0xef, 0x20, 0xee // vceq F32 d30 d1 d16
53 0x48, 0xef, 0x06, 0x1e // vceq F32 d17 d8 d6
56 0x41, 0xef, 0x07, 0xae // vceq F32 d26 d1 d7
59 0x46, 0xef, 0x2c, 0x1e // vceq F32 d17 d6 d28
62 0x46, 0xef, 0x2b, 0xee // vceq F32 d30 d6 d27
65 0x0d, 0xef, 0x0b, 0x6e // vceq F32 d6 d13 d11
[all …]
/external/capstone/suite/MC/ARM/
Dneont2-shift-encoding.s.cs2 0x40,0xff,0xa1,0x04 = vshl.u8 d16, d17, d16
3 0x50,0xff,0xa1,0x04 = vshl.u16 d16, d17, d16
4 0x60,0xff,0xa1,0x04 = vshl.u32 d16, d17, d16
5 0x70,0xff,0xa1,0x04 = vshl.u64 d16, d17, d16
6 0xcf,0xef,0x30,0x05 = vshl.i8 d16, d16, #7
7 0xdf,0xef,0x30,0x05 = vshl.i16 d16, d16, #15
8 0xff,0xef,0x30,0x05 = vshl.i32 d16, d16, #31
9 0xff,0xef,0xb0,0x05 = vshl.i64 d16, d16, #63
10 0x40,0xff,0xe2,0x04 = vshl.u8 q8, q9, q8
11 0x50,0xff,0xe2,0x04 = vshl.u16 q8, q9, q8
[all …]
Dneont2-add-encoding.s.cs2 0x41,0xef,0xa0,0x08 = vadd.i8 d16, d17, d16
3 0x51,0xef,0xa0,0x08 = vadd.i16 d16, d17, d16
4 0x71,0xef,0xa0,0x08 = vadd.i64 d16, d17, d16
5 0x61,0xef,0xa0,0x08 = vadd.i32 d16, d17, d16
6 0x40,0xef,0xa1,0x0d = vadd.f32 d16, d16, d17
7 0x40,0xef,0xe2,0x0d = vadd.f32 q8, q8, q9
8 0xc1,0xef,0xa0,0x00 = vaddl.s8 q8, d17, d16
9 0xd1,0xef,0xa0,0x00 = vaddl.s16 q8, d17, d16
10 0xe1,0xef,0xa0,0x00 = vaddl.s32 q8, d17, d16
11 0xc1,0xff,0xa0,0x00 = vaddl.u8 q8, d17, d16
[all …]
Dneont2-minmax-encoding.s.cs2 0x02,0xef,0x03,0x16 = vmax.s8 d1, d2, d3
3 0x15,0xef,0x06,0x46 = vmax.s16 d4, d5, d6
4 0x28,0xef,0x09,0x76 = vmax.s32 d7, d8, d9
5 0x0b,0xff,0x0c,0xa6 = vmax.u8 d10, d11, d12
6 0x1e,0xff,0x0f,0xd6 = vmax.u16 d13, d14, d15
7 0x61,0xff,0xa2,0x06 = vmax.u32 d16, d17, d18
8 0x44,0xef,0xa5,0x3f = vmax.f32 d19, d20, d21
9 0x02,0xef,0x03,0x26 = vmax.s8 d2, d2, d3
10 0x15,0xef,0x06,0x56 = vmax.s16 d5, d5, d6
11 0x28,0xef,0x09,0x86 = vmax.s32 d8, d8, d9
[all …]
Dneont2-mov-encoding.s.cs2 0xc0,0xef,0x18,0x0e = vmov.i8 d16, #0x8
3 0xc1,0xef,0x10,0x08 = vmov.i16 d16, #0x10
4 0xc1,0xef,0x10,0x0a = vmov.i16 d16, #0x1000
5 0xc2,0xef,0x10,0x00 = vmov.i32 d16, #0x20
6 0xc2,0xef,0x10,0x02 = vmov.i32 d16, #0x2000
7 0xc2,0xef,0x10,0x04 = vmov.i32 d16, #0x200000
8 0xc2,0xef,0x10,0x06 = vmov.i32 d16, #0x20000000
9 0xc2,0xef,0x10,0x0c = vmov.i32 d16, #0x20ff
10 0xc2,0xef,0x10,0x0d = vmov.i32 d16, #0x20ffff
11 0xc1,0xff,0x33,0x0e = vmov.i64 d16, #0xff0000ff0000ffff
[all …]
Dneont2-mul-accum-encoding.s.cs2 0x42,0xef,0xa1,0x09 = vmla.i8 d16, d18, d17
3 0x52,0xef,0xa1,0x09 = vmla.i16 d16, d18, d17
4 0x62,0xef,0xa1,0x09 = vmla.i32 d16, d18, d17
5 0x42,0xef,0xb1,0x0d = vmla.f32 d16, d18, d17
6 0x40,0xef,0xe4,0x29 = vmla.i8 q9, q8, q10
7 0x50,0xef,0xe4,0x29 = vmla.i16 q9, q8, q10
8 0x60,0xef,0xe4,0x29 = vmla.i32 q9, q8, q10
9 0x40,0xef,0xf4,0x2d = vmla.f32 q9, q8, q10
10 0xe0,0xff,0xc3,0x80 = vmla.i32 q12, q8, d3[0]
11 0xc3,0xef,0xa2,0x08 = vmlal.s8 q8, d19, d18
[all …]
Dneont2-satshift-encoding.s.cs2 0x41,0xef,0xb0,0x04 = vqshl.s8 d16, d16, d17
3 0x51,0xef,0xb0,0x04 = vqshl.s16 d16, d16, d17
4 0x61,0xef,0xb0,0x04 = vqshl.s32 d16, d16, d17
5 0x71,0xef,0xb0,0x04 = vqshl.s64 d16, d16, d17
6 0x41,0xff,0xb0,0x04 = vqshl.u8 d16, d16, d17
7 0x51,0xff,0xb0,0x04 = vqshl.u16 d16, d16, d17
8 0x61,0xff,0xb0,0x04 = vqshl.u32 d16, d16, d17
9 0x71,0xff,0xb0,0x04 = vqshl.u64 d16, d16, d17
10 0x42,0xef,0xf0,0x04 = vqshl.s8 q8, q8, q9
11 0x52,0xef,0xf0,0x04 = vqshl.s16 q8, q8, q9
[all …]
Dneont2-mul-encoding.s.cs2 0x40,0xef,0xb1,0x09 = vmul.i8 d16, d16, d17
3 0x50,0xef,0xb1,0x09 = vmul.i16 d16, d16, d17
4 0x60,0xef,0xb1,0x09 = vmul.i32 d16, d16, d17
5 0x40,0xff,0xb1,0x0d = vmul.f32 d16, d16, d17
6 0x40,0xef,0xf2,0x09 = vmul.i8 q8, q8, q9
7 0x50,0xef,0xf2,0x09 = vmul.i16 q8, q8, q9
8 0x60,0xef,0xf2,0x09 = vmul.i32 q8, q8, q9
9 0x40,0xff,0xf2,0x0d = vmul.f32 q8, q8, q9
10 0x40,0xff,0xb1,0x09 = vmul.p8 d16, d16, d17
11 0x40,0xff,0xf2,0x09 = vmul.p8 q8, q8, q9
[all …]
Dneont2-shiftaccum-encoding.s.cs2 0xc8,0xef,0x30,0x11 = vsra.s8 d17, d16, #8
3 0x90,0xef,0x1e,0xf1 = vsra.s16 d15, d14, #16
4 0xa0,0xef,0x1c,0xd1 = vsra.s32 d13, d12, #32
5 0x80,0xef,0x9a,0xb1 = vsra.s64 d11, d10, #64
6 0x88,0xef,0x54,0xe1 = vsra.s8 q7, q2, #8
7 0x90,0xef,0x5c,0x61 = vsra.s16 q3, q6, #16
8 0xe0,0xef,0x5a,0x21 = vsra.s32 q9, q5, #32
9 0xc0,0xef,0xd8,0x01 = vsra.s64 q8, q4, #64
10 0xc8,0xff,0x30,0x11 = vsra.u8 d17, d16, #8
11 0x95,0xff,0x1e,0xb1 = vsra.u16 d11, d14, #11
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dmve-bitops.s7 # CHECK: vorr.i16 q0, #0x12 @ encoding: [0x81,0xef,0x52,0x09]
8 # CHECK-NOFP: vorr.i16 q0, #0x12 @ encoding: [0x81,0xef,0x52,0x09]
9 vorr.i16 q0, #0x12
11 # CHECK: vorr.i32 q0, #0x1200 @ encoding: [0x81,0xef,0x52,0x03]
12 # CHECK-NOFP: vorr.i32 q0, #0x1200 @ encoding: [0x81,0xef,0x52,0x03]
13 vorr.i32 q0, #0x1200
15 # CHECK: vorr.i16 q0, #0xed @ encoding: [0x86,0xff,0x5d,0x09]
16 # CHECK-NOFP: vorr.i16 q0, #0xed @ encoding: [0x86,0xff,0x5d,0x09]
17 vorn.i16 q0, #0xff12
19 # CHECK: vorr.i32 q0, #0xed00 @ encoding: [0x86,0xff,0x5d,0x03]
[all …]
Dneont2-add-encoding.s5 @ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0x41,0xef,0xa0,0x08]
7 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08]
9 @ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0x71,0xef,0xa0,0x08]
11 @ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0x61,0xef,0xa0,0x08]
13 @ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0d]
15 @ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0d]
18 @ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xc1,0xef,0xa0,0x00]
20 @ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xd1,0xef,0xa0,0x00]
22 @ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xe1,0xef,0xa0,0x00]
24 @ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xc1,0xff,0xa0,0x00]
[all …]
Dneont2-minmax-encoding.s37 @ CHECK: vmax.s8 d1, d2, d3 @ encoding: [0x02,0xef,0x03,0x16]
38 @ CHECK: vmax.s16 d4, d5, d6 @ encoding: [0x15,0xef,0x06,0x46]
39 @ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x28,0xef,0x09,0x76]
40 @ CHECK: vmax.u8 d10, d11, d12 @ encoding: [0x0b,0xff,0x0c,0xa6]
41 @ CHECK: vmax.u16 d13, d14, d15 @ encoding: [0x1e,0xff,0x0f,0xd6]
42 @ CHECK: vmax.u32 d16, d17, d18 @ encoding: [0x61,0xff,0xa2,0x06]
43 @ CHECK: vmax.f32 d19, d20, d21 @ encoding: [0x44,0xef,0xa5,0x3f]
44 @ CHECK: vmax.s8 d2, d2, d3 @ encoding: [0x02,0xef,0x03,0x26]
45 @ CHECK: vmax.s16 d5, d5, d6 @ encoding: [0x15,0xef,0x06,0x56]
46 @ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x28,0xef,0x09,0x86]
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dneont2.txt3 0xf1 0xff 0x20 0x03
5 0xf5 0xff 0x20 0x03
7 0xf9 0xff 0x20 0x03
9 0xf9 0xff 0x20 0x07
11 0xf1 0xff 0x60 0x03
13 0xf5 0xff 0x60 0x03
15 0xf9 0xff 0x60 0x03
17 0xf9 0xff 0x60 0x07
20 0xf0 0xff 0x20 0x07
22 0xf4 0xff 0x20 0x07
[all …]
Dmve-integer.txt6 # CHECK: vmvn.i32 q0, #0x35 @ encoding: [0x83,0xef,0x75,0x00]
8 [0x83,0xef,0x75,0x00]
10 # CHECK: vmvn.i32 q0, #0x3500 @ encoding: [0x83,0xef,0x75,0x02]
12 [0x83,0xef,0x75,0x02]
14 # CHECK: vmvn.i32 q0, #0x350000 @ encoding: [0x83,0xef,0x75,0x04]
16 [0x83,0xef,0x75,0x04]
18 # CHECK: vmvn.i32 q0, #0x35000000 @ encoding: [0x83,0xef,0x75,0x06]
20 [0x83,0xef,0x75,0x06]
22 # CHECK: vmvn.i16 q0, #0x35 @ encoding: [0x83,0xef,0x75,0x08]
24 [0x83,0xef,0x75,0x08]
[all …]
Dfullfp16-neon-thumb.txt6 [0x11,0xef,0x02,0x0d]
7 [0x12,0xef,0x44,0x0d]
11 [0x31,0xef,0x02,0x0d]
12 [0x32,0xef,0x44,0x0d]
16 [0x11,0xff,0x12,0x0d]
17 [0x12,0xff,0x54,0x0d]
21 [0x92,0xef,0x63,0x19]
22 [0x9a,0xff,0x6e,0x89]
26 [0x11,0xef,0x12,0x0d]
27 [0x12,0xef,0x54,0x0d]
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt3 0xf1 0xff 0x20 0x03
5 0xf5 0xff 0x20 0x03
7 0xf9 0xff 0x20 0x03
9 0xf9 0xff 0x20 0x07
11 0xf1 0xff 0x60 0x03
13 0xf5 0xff 0x60 0x03
15 0xf9 0xff 0x60 0x03
17 0xf9 0xff 0x60 0x07
20 0xf0 0xff 0x20 0x07
22 0xf4 0xff 0x20 0x07
[all …]
Dfullfp16-neon-thumb.txt6 [0x11,0xef,0x02,0x0d]
7 [0x12,0xef,0x44,0x0d]
11 [0x31,0xef,0x02,0x0d]
12 [0x32,0xef,0x44,0x0d]
16 [0x11,0xff,0x12,0x0d]
17 [0x12,0xff,0x54,0x0d]
21 [0x92,0xef,0x63,0x19]
22 [0x9a,0xff,0x6e,0x89]
26 [0x11,0xef,0x12,0x0d]
27 [0x12,0xef,0x54,0x0d]
[all …]
/external/icu/icu4c/source/data/mappings/
Dicu-internal-compound-t.ucm25 <U0080> \xC2\x80 |0
26 <U0081> \xC2\x81 |0
27 <U0082> \xC2\x82 |0
28 <U0083> \xC2\x83 |0
29 <U0084> \xC2\x84 |0
30 <U0085> \xC2\x85 |0
31 <U0086> \xC2\x86 |0
32 <U0087> \xC2\x87 |0
33 <U0088> \xC2\x88 |0
34 <U0089> \xC2\x89 |0
[all …]
/external/llvm/test/MC/ARM/
Dneont2-add-encoding.s5 @ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0x41,0xef,0xa0,0x08]
7 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08]
9 @ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0x71,0xef,0xa0,0x08]
11 @ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0x61,0xef,0xa0,0x08]
13 @ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0d]
15 @ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0d]
18 @ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xc1,0xef,0xa0,0x00]
20 @ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xd1,0xef,0xa0,0x00]
22 @ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xe1,0xef,0xa0,0x00]
24 @ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xc1,0xff,0xa0,0x00]
[all …]
Dneont2-minmax-encoding.s37 @ CHECK: vmax.s8 d1, d2, d3 @ encoding: [0x02,0xef,0x03,0x16]
38 @ CHECK: vmax.s16 d4, d5, d6 @ encoding: [0x15,0xef,0x06,0x46]
39 @ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x28,0xef,0x09,0x76]
40 @ CHECK: vmax.u8 d10, d11, d12 @ encoding: [0x0b,0xff,0x0c,0xa6]
41 @ CHECK: vmax.u16 d13, d14, d15 @ encoding: [0x1e,0xff,0x0f,0xd6]
42 @ CHECK: vmax.u32 d16, d17, d18 @ encoding: [0x61,0xff,0xa2,0x06]
43 @ CHECK: vmax.f32 d19, d20, d21 @ encoding: [0x44,0xef,0xa5,0x3f]
44 @ CHECK: vmax.s8 d2, d2, d3 @ encoding: [0x02,0xef,0x03,0x26]
45 @ CHECK: vmax.s16 d5, d5, d6 @ encoding: [0x15,0xef,0x06,0x56]
46 @ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x28,0xef,0x09,0x86]
[all …]
Dneont2-shift-encoding.s5 @ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x04]
7 @ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x04]
9 @ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x04]
11 @ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x04]
13 @ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x05]
15 @ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0xdf,0xef,0x30,0x05]
17 @ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x05]
19 @ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x05]
21 @ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0x40,0xff,0xe2,0x04]
23 @ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0x50,0xff,0xe2,0x04]
[all …]

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