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/external/curl/tests/data/
Dtest106023 And you should ignore this data. aaaaaaaaaaaaaaaa
24 And you should ignore this data. aaaaaaaaaaaaaaaa
25 And you should ignore this data. aaaaaaaaaaaaaaaa
26 And you should ignore this data. aaaaaaaaaaaaaaaa
27 And you should ignore this data. aaaaaaaaaaaaaaaa
28 And you should ignore this data. aaaaaaaaaaaaaaaa
29 And you should ignore this data. aaaaaaaaaaaaaaaa
30 And you should ignore this data. aaaaaaaaaaaaaaaa
31 And you should ignore this data. aaaaaaaaaaaaaaaa
32 And you should ignore this data. aaaaaaaaaaaaaaaa
[all …]
Dtest106125 And you should ignore this data. aaaaaaaaaaaaaaaa
26 And you should ignore this data. aaaaaaaaaaaaaaaa
27 And you should ignore this data. aaaaaaaaaaaaaaaa
28 And you should ignore this data. aaaaaaaaaaaaaaaa
29 And you should ignore this data. aaaaaaaaaaaaaaaa
30 And you should ignore this data. aaaaaaaaaaaaaaaa
31 And you should ignore this data. aaaaaaaaaaaaaaaa
32 And you should ignore this data. aaaaaaaaaaaaaaaa
33 And you should ignore this data. aaaaaaaaaaaaaaaa
34 And you should ignore this data. aaaaaaaaaaaaaaaa
[all …]
/external/python/cpython3/Lib/test/decimaltestdata/
DdqAnd.decTest2 -- dqAnd.decTest -- digitwise logical AND for decQuads --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
30 dqand001 and 0 0 -> 0
31 dqand002 and 0 1 -> 0
32 dqand003 and 1 0 -> 0
33 dqand004 and 1 1 -> 1
34 dqand005 and 1100 1010 -> 1000
35 -- and at msd and msd-1
37 dqand006 and 0000000000000000000000000000000000 0000000000000000000000000000000000 -> …
[all …]
Dand.decTest2 -- and.decTest -- digitwise logical AND --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
29 andx001 and 0 0 -> 0
30 andx002 and 0 1 -> 0
31 andx003 and 1 0 -> 0
32 andx004 and 1 1 -> 1
33 andx005 and 1100 1010 -> 1000
34 andx006 and 1111 10 -> 10
35 andx007 and 1111 1010 -> 1010
[all …]
DddAnd.decTest2 -- ddAnd.decTest -- digitwise logical AND for decDoubles --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
30 ddand001 and 0 0 -> 0
31 ddand002 and 0 1 -> 0
32 ddand003 and 1 0 -> 0
33 ddand004 and 1 1 -> 1
34 ddand005 and 1100 1010 -> 1000
35 -- and at msd and msd-1
37 ddand006 and 0000000000000000 0000000000000000 -> 0
[all …]
/external/python/cpython2/Lib/test/decimaltestdata/
DdqAnd.decTest2 -- dqAnd.decTest -- digitwise logical AND for decQuads --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
30 dqand001 and 0 0 -> 0
31 dqand002 and 0 1 -> 0
32 dqand003 and 1 0 -> 0
33 dqand004 and 1 1 -> 1
34 dqand005 and 1100 1010 -> 1000
35 -- and at msd and msd-1
37 dqand006 and 0000000000000000000000000000000000 0000000000000000000000000000000000 -> …
[all …]
Dand.decTest2 -- and.decTest -- digitwise logical AND --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
29 andx001 and 0 0 -> 0
30 andx002 and 0 1 -> 0
31 andx003 and 1 0 -> 0
32 andx004 and 1 1 -> 1
33 andx005 and 1100 1010 -> 1000
34 andx006 and 1111 10 -> 10
35 andx007 and 1111 1010 -> 1010
[all …]
DddAnd.decTest2 -- ddAnd.decTest -- digitwise logical AND for decDoubles --
9 -- These testcases are experimental ('beta' versions), and they --
15 -- Please send comments, suggestions, and corrections to the author: --
30 ddand001 and 0 0 -> 0
31 ddand002 and 0 1 -> 0
32 ddand003 and 1 0 -> 0
33 ddand004 and 1 1 -> 1
34 ddand005 and 1100 1010 -> 1000
35 -- and at msd and msd-1
37 ddand006 and 0000000000000000 0000000000000000 -> 0
[all …]
/external/one-true-awk/testdir/
Dbib1 In the beginning God created the heaven and the earth.
2 And the earth was without form, and void; and darkness was upon the face of the deep. And the Spiri…
3 And God said, Let there be light: and there was light.
4 And God saw the light, that it was good: and God divided the light from the darkness.
5 And God called the light Day, and the darkness he called Night. And the evening and the morning wer…
6 And God said, Let there be a firmament in the midst of the waters, and let it divide the waters fro…
7 And God made the firmament, and divided the waters which were under the firmament from the waters w…
8 And God called the firmament Heaven. And the evening and the morning were the second day.
9 And God said, Let the waters under the heaven be gathered together unto one place, and let the dry …
10 And God called the dry land Earth; and the gathering together of the waters called he Seas: and God…
[all …]
/external/llvm-project/llvm/test/Transforms/CorrelatedValuePropagation/
Dcrash.ll15 %and.us.us = and i16 %conv6.us.us, %and.us.us
66 %a1 = and i1 %a0, %a0
67 %a2 = and i1 %a1, %a1
68 %a3 = and i1 %a2, %a2
69 %a4 = and i1 %a3, %a3
70 %a5 = and i1 %a4, %a4
71 %a6 = and i1 %a5, %a5
72 %a7 = and i1 %a6, %a6
73 %a8 = and i1 %a7, %a7
74 %a9 = and i1 %a8, %a8
[all …]
/external/libcups/examples/
Dtestfile.txt1 All work and no play makes Johhny a dull boy. All work and no
2 play makes Johhny a dull boy. All work and no play makes Johhny
3 a dull boy. All work and no play makes Johhny a dull boy. All
4 work and no play makes Johhny a dull boy. All work and no play
5 makes Johhny a dull boy. All work and no play makes Johhny a
6 dull boy. All work and no play makes Johhny a dull boy. All
7 work and no play makes Johhny a dull boy. All work and no play
8 makes Johhny a dull boy. All work and no play makes Johhny a
9 dull boy. All work and no play makes Johhny a dull boy. All
10 work and no play makes Johhny a dull boy. All work and no play
[all …]
/external/llvm-project/polly/lib/External/isl/test_inputs/schedule/
Dpoliwoda.sc9 domain: [_PB_M, _PB_N] -> { S_0[Id1, Id2, Id3] : _PB_M >= 2 and Id1 >=
10 0 and 4Id1 < _PB_N and 2Id2 >= -_PB_M and 4Id2 <= -_PB_M and Id3 <=
11 0 and 4Id3 >= -3 + _PB_M + 4Id2 and 4Id3 >= -1 - _PB_M; S_1[Id1, Id2,
12 Id3] : _PB_M >= 2 and Id1 >= 0 and 4Id1 < _PB_N and -_PB_M <= 2Id2 <=
13 1 - _PB_M and Id3 <= 0 and 4Id3 >= -1 - _PB_M }
15 Id3'] : Id1 >= 0 and 4Id1 < _PB_N and Id3 <= 0 and 4Id3 >= -3 + _PB_M +
16 4Id2 and Id2' <= Id2 and 2Id2' >= -_PB_M and Id3' < 0 and Id3' <= Id3
17 and Id3' < Id2 + Id3 - Id2' and 4Id3' >= -4 + _PB_M + 4Id2 and 4Id3' >=
18 -3 + _PB_M + 3Id2 + Id2' and -1 - _PB_M <= 4Id3' <= 2 + _PB_M + 4Id2;
19 S_0[Id1, Id2, Id3] -> S_0[Id1' = Id1, Id2', Id3' = Id3] : Id1 >= 0 and
[all …]
/external/llvm-project/polly/lib/External/isl/test_inputs/codegen/cloog/
Dsor1d.st1 …and i4 >= -193 - 200i1 and i4 >= -194 + 100i0 - 200i1 and 100i0 >= -284 - 3N and i4 <= -1 + N and …
3 context: "[M, N] -> { [] : M >= 0 and N >= 0 }"
Dmxm-shared.st1 …and g4 = 0 and g2 = 8b0 and 128e0 = g1 and 4096e1 = 128b1 - g1 and 128e2 = -8b0 + g0 and 16e3 = -t…
3 …and g3 = 128b1 and 8e0 = g0 and 4096e1 = -128b1 + g1 and 128e2 = 8b0 - g0 and b0 >= 0 and g4 <= -1…
Dswim.st1 …and i0 >= 2 and i0 <= P and i1 >= 1 and i1 <= Q and i2 >= 1 and i2 <= R; S106[i0, i1, i2] : M = 1 …
/external/brotli/tests/testdata/
Dplrabn12.txt16 a specific location, and then it took months to convince people
18 the copying and get it to us. Then another month to convert to
21 will see below. The original was, of course, in CAPS only, and
22 so were all the other etexts of the 60's and early 70's. Don't
23 let anyone fool you into thinking any etext with both upper and
25 etexts were also in upper case and were translated or rewritten
29 In the course of our searches for Professor Raben and his etext
32 little information here and there, but even after we received a
34 determining that it was in fact Public Domain and finding Raben
35 to verify this and get his permission. Interested enough, in a
[all …]
/external/llvm-project/polly/lib/External/isl/test_inputs/codegen/
Droman.in3 …and 4294967296e0 <= np1 - i and 4294967296e0 >= -4294967295 + np1 - i and 4294967296e0 <= np1 - i …
4 … 4294967296e0 <= np1 - i and 4294967296e0 >= -20 + np1 - i and np1 >= -2147483648 and np1 <= 21474…
Dshift2.in3 …and 32e0 = o2 and 32e1 = o3 and 32e2 = -length + o5 and 32e3 = -2length + o6 and o2 <= length and …
4 [tsteps, length] -> { : length >= 0 and length <= 1024 and tsteps = 2 }
Dredundant.st2 …and o1 >= 0 and o2 <= 12 and o2 >= 1 and o3 <= 14 and o3 >= 1 and 8e0 <= 4 + o2 and 8e1 <= 5 + o2 …
4 context: "[b0] -> { [] : b0 <= 2 and b0 >= 0 }"
/external/llvm-project/llvm/test/Transforms/InstSimplify/
Dand-icmps-same-ops.ll4 ; There are 10 * 10 combinations of icmp predicates that can be AND'd together.
14 %and = and i1 %cmp1, %cmp2
15 ret i1 %and
24 %and = and i1 %cmp1, %cmp2
25 ret i1 %and
35 %and = and i1 %cmp1, %cmp2
36 ret i1 %and
45 %and = and i1 %cmp1, %cmp2
46 ret i1 %and
56 %and = and i1 %cmp1, %cmp2
[all …]
/external/capstone/arch/X86/
DX86DisassemblerDecoderCommon.h11 * It contains common definitions used by both the disassembler and the table
22 * the decoder and the table generator in a C-friendly manner.
85 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
96 ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
115 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
116 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
117 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
118 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
119 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
120 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
[all …]
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoderCommon.h11 // It contains common definitions used by both the disassembler and the table
85 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
96 ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
115 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
116 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
117 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
118 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
119 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
120 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
121 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
[all …]
/external/llvm-project/llvm/include/llvm/Support/
DX86DisassemblerDecoderCommon.h10 // It contains common definitions used by both the disassembler and the table
80 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
95 ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
116 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
117 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
118 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
119 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
120 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
121 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
122 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DX86DisassemblerDecoderCommon.h10 // It contains common definitions used by both the disassembler and the table
80 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
95 ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
116 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
117 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
118 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
119 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
120 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
121 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
122 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
[all …]
/external/llvm/test/CodeGen/SystemZ/
Drisbg-01.ll12 %and = and i32 %shr, 1
13 ret i32 %and
16 ; ...and again with i64.
22 %and = and i64 %shr, 1
23 ret i64 %and
32 %and = and i32 %shr, 12
33 ret i32 %and
36 ; ...and again with i64.
42 %and = and i64 %shr, 12
43 ret i64 %and
[all …]

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