1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#include <clc/clc.h>
24
25#include "ep_log.h"
26#include "math.h"
27#include "../clcmacro.h"
28
29_CLC_OVERLOAD _CLC_DEF  float acosh(float x) {
30    uint ux = as_uint(x);
31
32    // Arguments greater than 1/sqrt(epsilon) in magnitude are
33    // approximated by acosh(x) = ln(2) + ln(x)
34    // For 2.0 <= x <= 1/sqrt(epsilon) the approximation is
35    // acosh(x) = ln(x + sqrt(x*x-1)) */
36    int high = ux > 0x46000000U;
37    int med = ux > 0x40000000U;
38
39    float w = x - 1.0f;
40    float s = w*w + 2.0f*w;
41    float t = x*x - 1.0f;
42    float r = sqrt(med ? t : s) + (med ? x : w);
43    float v = (high ? x : r) - (med ? 1.0f : 0.0f);
44    float z = log1p(v) + (high ? 0x1.62e430p-1f : 0.0f);
45
46    z = ux >= PINFBITPATT_SP32 ? x : z;
47    z = x < 1.0f ? as_float(QNANBITPATT_SP32) : z;
48
49    return z;
50}
51
52_CLC_UNARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, float, acosh, float)
53
54#ifdef cl_khr_fp64
55#pragma OPENCL EXTENSION cl_khr_fp64 : enable
56
57_CLC_OVERLOAD _CLC_DEF double acosh(double x) {
58    const double recrteps = 0x1.6a09e667f3bcdp+26;	// 1/sqrt(eps) = 9.49062656242515593767e+07
59    //log2_lead and log2_tail sum to an extra-precise version of log(2)
60    const double log2_lead = 0x1.62e42ep-1;
61    const double log2_tail = 0x1.efa39ef35793cp-25;
62
63    // Handle x >= 128 here
64    int xlarge = x > recrteps;
65    double r = x + sqrt(fma(x, x, -1.0));
66    r = xlarge ? x : r;
67
68    int xexp;
69    double r1, r2;
70    __clc_ep_log(r, &xexp, &r1, &r2);
71
72    double dxexp = xexp + xlarge;
73    r1 = fma(dxexp, log2_lead, r1);
74    r2 = fma(dxexp, log2_tail, r2);
75
76    double ret1 = r1 + r2;
77
78    // Handle 1 < x < 128 here
79    // We compute the value
80    // t = x - 1.0 + sqrt(2.0*(x - 1.0) + (x - 1.0)*(x - 1.0))
81    // using simulated quad precision.
82    double t = x - 1.0;
83    double u1 = t * 2.0;
84
85    // (t,0) * (t,0) -> (v1, v2)
86    double v1 = t * t;
87    double v2 = fma(t, t, -v1);
88
89    // (u1,0) + (v1,v2) -> (w1,w2)
90    r = u1 + v1;
91    double s = (((u1 - r) + v1) + v2);
92    double w1 = r + s;
93    double w2 = (r - w1) + s;
94
95    // sqrt(w1,w2) -> (u1,u2)
96    double p1 = sqrt(w1);
97    double a1 = p1*p1;
98    double a2 = fma(p1, p1, -a1);
99    double temp = (((w1 - a1) - a2) + w2);
100    double p2 = MATH_DIVIDE(temp * 0.5, p1);
101    u1 = p1 + p2;
102    double u2 = (p1 - u1) + p2;
103
104    // (u1,u2) + (t,0) -> (r1,r2)
105    r = u1 + t;
106    s = ((u1 - r) + t) + u2;
107    // r1 = r + s;
108    // r2 = (r - r1) + s;
109    // t = r1 + r2;
110    t = r + s;
111
112    // For arguments 1.13 <= x <= 1.5 the log1p function is good enough
113    double ret2 = log1p(t);
114
115    ulong ux = as_ulong(x);
116    double ret = x >= 128.0 ? ret1 : ret2;
117
118    ret = ux >= 0x7FF0000000000000 ? x : ret;
119    ret = x == 1.0 ? 0.0 : ret;
120    ret = (ux & SIGNBIT_DP64) != 0UL | x < 1.0 ? as_double(QNANBITPATT_DP64) : ret;
121
122    return ret;
123}
124
125_CLC_UNARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, double, acosh, double)
126
127#endif
128