1 //===-- EmulateInstructionMIPS.h ------------------------------------*- C++
2 //-*-===//
3 //
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H
11 #define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H
12 
13 namespace llvm {
14 class MCDisassembler;
15 class MCSubtargetInfo;
16 class MCRegisterInfo;
17 class MCAsmInfo;
18 class MCContext;
19 class MCInstrInfo;
20 class MCInst;
21 }
22 
23 namespace lldb_private {
24   class OptionValueDictionary;
25 }
26 
27 #include "lldb/Core/EmulateInstruction.h"
28 #include "lldb/Utility/Status.h"
29 
30 class EmulateInstructionMIPS : public lldb_private::EmulateInstruction {
31 public:
32   static void Initialize();
33 
34   static void Terminate();
35 
36   static lldb_private::ConstString GetPluginNameStatic();
37 
38   static const char *GetPluginDescriptionStatic();
39 
40   static lldb_private::EmulateInstruction *
41   CreateInstance(const lldb_private::ArchSpec &arch,
42                  lldb_private::InstructionType inst_type);
43 
SupportsEmulatingInstructionsOfTypeStatic(lldb_private::InstructionType inst_type)44   static bool SupportsEmulatingInstructionsOfTypeStatic(
45       lldb_private::InstructionType inst_type) {
46     switch (inst_type) {
47     case lldb_private::eInstructionTypeAny:
48     case lldb_private::eInstructionTypePrologueEpilogue:
49     case lldb_private::eInstructionTypePCModifying:
50       return true;
51 
52     case lldb_private::eInstructionTypeAll:
53       return false;
54     }
55     return false;
56   }
57 
58   lldb_private::ConstString GetPluginName() override;
59 
GetPluginVersion()60   uint32_t GetPluginVersion() override { return 1; }
61 
62   bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
63 
64   EmulateInstructionMIPS(const lldb_private::ArchSpec &arch);
65 
SupportsEmulatingInstructionsOfType(lldb_private::InstructionType inst_type)66   bool SupportsEmulatingInstructionsOfType(
67       lldb_private::InstructionType inst_type) override {
68     return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
69   }
70 
71   bool ReadInstruction() override;
72 
73   bool EvaluateInstruction(uint32_t evaluate_options) override;
74 
75   bool SetInstruction(const lldb_private::Opcode &insn_opcode,
76                       const lldb_private::Address &inst_addr,
77                       lldb_private::Target *target) override;
78 
TestEmulation(lldb_private::Stream * out_stream,lldb_private::ArchSpec & arch,lldb_private::OptionValueDictionary * test_data)79   bool TestEmulation(lldb_private::Stream *out_stream,
80                      lldb_private::ArchSpec &arch,
81                      lldb_private::OptionValueDictionary *test_data) override {
82     return false;
83   }
84 
85   bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
86                        lldb_private::RegisterInfo &reg_info) override;
87 
88   bool
89   CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
90 
91 protected:
92   typedef struct {
93     const char *op_name;
94     bool (EmulateInstructionMIPS::*callback)(llvm::MCInst &insn);
95     const char *insn_name;
96   } MipsOpcode;
97 
98   static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
99 
100   uint32_t GetSizeOfInstruction(lldb_private::DataExtractor &data,
101                                 uint64_t inst_addr);
102 
103   bool Emulate_ADDiu(llvm::MCInst &insn);
104 
105   bool Emulate_SUBU_ADDU(llvm::MCInst &insn);
106 
107   bool Emulate_LUI(llvm::MCInst &insn);
108 
109   bool Emulate_SW(llvm::MCInst &insn);
110 
111   bool Emulate_LW(llvm::MCInst &insn);
112 
113   bool Emulate_ADDIUSP(llvm::MCInst &insn);
114 
115   bool Emulate_ADDIUS5(llvm::MCInst &insn);
116 
117   bool Emulate_SWSP(llvm::MCInst &insn);
118 
119   bool Emulate_SWM16_32(llvm::MCInst &insn);
120 
121   bool Emulate_LWSP(llvm::MCInst &insn);
122 
123   bool Emulate_LWM16_32(llvm::MCInst &insn);
124 
125   bool Emulate_JRADDIUSP(llvm::MCInst &insn);
126 
127   bool Emulate_LDST_Imm(llvm::MCInst &insn);
128 
129   bool Emulate_LDST_Reg(llvm::MCInst &insn);
130 
131   bool Emulate_BXX_3ops(llvm::MCInst &insn);
132 
133   bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
134 
135   bool Emulate_BXX_2ops(llvm::MCInst &insn);
136 
137   bool Emulate_BXX_2ops_C(llvm::MCInst &insn);
138 
139   bool Emulate_Bcond_Link_C(llvm::MCInst &insn);
140 
141   bool Emulate_Bcond_Link(llvm::MCInst &insn);
142 
143   bool Emulate_FP_branch(llvm::MCInst &insn);
144 
145   bool Emulate_3D_branch(llvm::MCInst &insn);
146 
147   bool Emulate_BAL(llvm::MCInst &insn);
148 
149   bool Emulate_BALC(llvm::MCInst &insn);
150 
151   bool Emulate_BC(llvm::MCInst &insn);
152 
153   bool Emulate_J(llvm::MCInst &insn);
154 
155   bool Emulate_JAL(llvm::MCInst &insn);
156 
157   bool Emulate_JALR(llvm::MCInst &insn);
158 
159   bool Emulate_JIALC(llvm::MCInst &insn);
160 
161   bool Emulate_JIC(llvm::MCInst &insn);
162 
163   bool Emulate_JR(llvm::MCInst &insn);
164 
165   bool Emulate_BC1EQZ(llvm::MCInst &insn);
166 
167   bool Emulate_BC1NEZ(llvm::MCInst &insn);
168 
169   bool Emulate_BNZB(llvm::MCInst &insn);
170 
171   bool Emulate_BNZH(llvm::MCInst &insn);
172 
173   bool Emulate_BNZW(llvm::MCInst &insn);
174 
175   bool Emulate_BNZD(llvm::MCInst &insn);
176 
177   bool Emulate_BZB(llvm::MCInst &insn);
178 
179   bool Emulate_BZH(llvm::MCInst &insn);
180 
181   bool Emulate_BZW(llvm::MCInst &insn);
182 
183   bool Emulate_BZD(llvm::MCInst &insn);
184 
185   bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size,
186                              bool bnz);
187 
188   bool Emulate_BNZV(llvm::MCInst &insn);
189 
190   bool Emulate_BZV(llvm::MCInst &insn);
191 
192   bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz);
193 
194   bool Emulate_B16_MM(llvm::MCInst &insn);
195 
196   bool Emulate_Branch_MM(llvm::MCInst &insn);
197 
198   bool Emulate_JALRx16_MM(llvm::MCInst &insn);
199 
200   bool Emulate_JALx(llvm::MCInst &insn);
201 
202   bool Emulate_JALRS(llvm::MCInst &insn);
203 
204   bool nonvolatile_reg_p(uint32_t regnum);
205 
206   const char *GetRegisterName(unsigned reg_num, bool alternate_name);
207 
208 private:
209   std::unique_ptr<llvm::MCDisassembler> m_disasm;
210   std::unique_ptr<llvm::MCDisassembler> m_alt_disasm;
211   std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info;
212   std::unique_ptr<llvm::MCSubtargetInfo> m_alt_subtype_info;
213   std::unique_ptr<llvm::MCRegisterInfo> m_reg_info;
214   std::unique_ptr<llvm::MCAsmInfo> m_asm_info;
215   std::unique_ptr<llvm::MCContext> m_context;
216   std::unique_ptr<llvm::MCInstrInfo> m_insn_info;
217   uint32_t m_next_inst_size;
218   bool m_use_alt_disaasm;
219 };
220 
221 #endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H
222