1 /* Copyright (c) 2002 Intel Corporation */
2 #include <stdio.h>
3 #include "internal.h"
4
5 #define D102_REV_ID 12
6
7 #define MDI_MDIX_CONFIG_IS_OK 0x0010
8 #define MDI_MDIX_STATUS 0x0020
9
10 #define SOFT_INT 0x0200 /* Generate a S/W interrupt */
11
12 /* Interrupt masks */
13 #define ALL_INT_MASK 0x0100 /* Mask interrupts */
14 #define FCP_INT_MASK 0x0400 /* Flow Control Pause */
15 #define ER_INT_MASK 0x0800 /* Early Receive */
16 #define RNR_INT_MASK 0x1000 /* RU Not Ready */
17 #define CNA_INT_MASK 0x2000 /* CU Not Active */
18 #define FR_INT_MASK 0x4000 /* Frame Received */
19 #define CX_INT_MASK 0x8000 /* CU eXecution w/ I-bit done */
20
21 /* Interrupts pending */
22 #define FCP_INT_PENDING 0x0100 /* Flow Control Pause */
23 #define ER_INT_PENDING 0x0200 /* Early Receive */
24 #define SWI_INT_PENDING 0x0400 /* S/W generated interrupt */
25 #define MDI_INT_PENDING 0x0800 /* MDI read or write done */
26 #define RNR_INT_PENDING 0x1000 /* RU Became Not Ready */
27 #define CNA_INT_PENDING 0x2000 /* CU Became Inactive (IDLE) */
28 #define FR_INT_PENDING 0x4000 /* RU Received A Frame */
29 #define CX_INT_PENDING 0x8000 /* CU Completed Action Cmd */
30
31 /* Status */
32 #define CU_STATUS 0x00C0
33 #define RU_STATUS 0x003C
34
35 /* Commands */
36 #define CU_CMD 0x00F0
37 #define RU_CMD 0x0007
38
e100_dump_regs(struct ethtool_drvinfo * info maybe_unused,struct ethtool_regs * regs)39 int e100_dump_regs(struct ethtool_drvinfo *info maybe_unused,
40 struct ethtool_regs *regs)
41 {
42 u32 *regs_buff = (u32 *)regs->data;
43 u8 version = (u8)(regs->version >> 24);
44 u8 rev_id = (u8)(regs->version);
45 u8 regs_len = regs->len / sizeof(u32);
46 u32 reg;
47 u16 scb_status, scb_cmd;
48
49 if (version != 1)
50 return -1;
51
52 reg = regs_buff[0];
53 scb_status = reg & 0x0000ffff;
54 scb_cmd = reg >> 16;
55 fprintf(stdout,
56 "SCB Status Word (Lower Word) 0x%04X\n",
57 scb_status);
58
59 switch ((scb_status & RU_STATUS) >> 2) {
60 case 0:
61 fprintf(stdout,
62 " RU Status: Idle\n");
63 break;
64 case 1:
65 fprintf(stdout,
66 " RU Status: Suspended\n");
67 break;
68 case 2:
69 fprintf(stdout,
70 " RU Status: No Resources\n");
71 break;
72 case 4:
73 fprintf(stdout,
74 " RU Status: Ready\n");
75 break;
76 case 9:
77 fprintf(stdout,
78 " RU Status: Suspended with no more RBDs\n");
79 break;
80 case 10:
81 fprintf(stdout,
82 " RU Status: No Resources due to no more RBDs\n");
83 break;
84 case 12:
85 fprintf(stdout,
86 " RU Status: Ready with no RBDs present\n");
87 break;
88 default:
89 fprintf(stdout,
90 " RU Status: Unknown State\n");
91 break;
92 }
93
94 switch ((scb_status & CU_STATUS) >> 6) {
95 case 0:
96 fprintf(stdout,
97 " CU Status: Idle\n");
98 break;
99 case 1:
100 fprintf(stdout,
101 " CU Status: Suspended\n");
102 break;
103 case 2:
104 fprintf(stdout,
105 " CU Status: Active\n");
106 break;
107 default:
108 fprintf(stdout,
109 " CU Status: Unknown State\n");
110 break;
111 }
112
113 fprintf(stdout,
114 " ---- Interrupts Pending ----\n"
115 " Flow Control Pause: %s\n"
116 " Early Receive: %s\n"
117 " Software Generated Interrupt: %s\n"
118 " MDI Done: %s\n"
119 " RU Not In Ready State: %s\n"
120 " CU Not in Active State: %s\n"
121 " RU Received Frame: %s\n"
122 " CU Completed Command: %s\n",
123 scb_status & FCP_INT_PENDING ? "yes" : "no",
124 scb_status & ER_INT_PENDING ? "yes" : "no",
125 scb_status & SWI_INT_PENDING ? "yes" : "no",
126 scb_status & MDI_INT_PENDING ? "yes" : "no",
127 scb_status & RNR_INT_PENDING ? "yes" : "no",
128 scb_status & CNA_INT_PENDING ? "yes" : "no",
129 scb_status & FR_INT_PENDING ? "yes" : "no",
130 scb_status & CX_INT_PENDING ? "yes" : "no");
131
132 fprintf(stdout,
133 "SCB Command Word (Upper Word) 0x%04X\n",
134 scb_cmd);
135
136 switch (scb_cmd & RU_CMD) {
137 case 0:
138 fprintf(stdout,
139 " RU Command: No Command\n");
140 break;
141 case 1:
142 fprintf(stdout,
143 " RU Command: RU Start\n");
144 break;
145 case 2:
146 fprintf(stdout,
147 " RU Command: RU Resume\n");
148 break;
149 case 4:
150 fprintf(stdout,
151 " RU Command: RU Abort\n");
152 break;
153 case 6:
154 fprintf(stdout,
155 " RU Command: Load RU Base\n");
156 break;
157 default:
158 fprintf(stdout,
159 " RU Command: Unknown\n");
160 break;
161 }
162
163 switch ((scb_cmd & CU_CMD) >> 4) {
164 case 0:
165 fprintf(stdout,
166 " CU Command: No Command\n");
167 break;
168 case 1:
169 fprintf(stdout,
170 " CU Command: CU Start\n");
171 break;
172 case 2:
173 fprintf(stdout,
174 " CU Command: CU Resume\n");
175 break;
176 case 4:
177 fprintf(stdout,
178 " CU Command: Load Dump Counters Address\n");
179 break;
180 case 5:
181 fprintf(stdout,
182 " CU Command: Dump Counters\n");
183 break;
184 case 6:
185 fprintf(stdout,
186 " CU Command: Load CU Base\n");
187 break;
188 case 7:
189 fprintf(stdout,
190 " CU Command: Dump & Reset Counters\n");
191 break;
192 default:
193 fprintf(stdout,
194 " CU Command: Unknown\n");
195 break;
196 }
197
198 fprintf(stdout,
199 " Software Generated Interrupt: %s\n",
200 scb_cmd & SOFT_INT ? "yes" : "no");
201
202 fprintf(stdout,
203 " ---- Interrupts Masked ----\n"
204 " ALL Interrupts: %s\n"
205 " Flow Control Pause: %s\n"
206 " Early Receive: %s\n"
207 " RU Not In Ready State: %s\n"
208 " CU Not in Active State: %s\n"
209 " RU Received Frame: %s\n"
210 " CU Completed Command: %s\n",
211 scb_cmd & ALL_INT_MASK ? "yes" : "no",
212 scb_cmd & FCP_INT_MASK ? "yes" : "no",
213 scb_cmd & ER_INT_MASK ? "yes" : "no",
214 scb_cmd & RNR_INT_MASK ? "yes" : "no",
215 scb_cmd & CNA_INT_MASK ? "yes" : "no",
216 scb_cmd & FR_INT_MASK ? "yes" : "no",
217 scb_cmd & CX_INT_MASK ? "yes" : "no");
218
219 if(regs_len > 1) {
220 fprintf(stdout, "MDI/MDI-X Status: ");
221 if(rev_id < D102_REV_ID)
222 fprintf(stdout, "MDI\n");
223 else {
224 u16 ctrl_reg = regs_buff[1];
225
226 if(ctrl_reg & MDI_MDIX_CONFIG_IS_OK) {
227 if(ctrl_reg & MDI_MDIX_STATUS)
228 fprintf(stdout, "MDI-X\n");
229 else
230 fprintf(stdout, "MDI\n");
231 } else
232 fprintf(stdout, "Unknown\n");
233 }
234 }
235
236 return 0;
237 }
238
239