1 #ifndef CAPSTONE_MOS65XX_H 2 #define CAPSTONE_MOS65XX_H 3 4 /* Capstone Disassembly Engine */ 5 /* By Sebastian Macke <sebastian@macke.de, 2018 */ 6 7 #ifdef __cplusplus 8 extern "C" { 9 #endif 10 11 #include "platform.h" 12 13 /// MOS65XX registers and special registers 14 typedef enum mos65xx_reg { 15 MOS65XX_REG_INVALID = 0, 16 MOS65XX_REG_ACC, ///< accumulator 17 MOS65XX_REG_X, ///< X index register 18 MOS65XX_REG_Y, ///< Y index register 19 MOS65XX_REG_P, ///< status register 20 MOS65XX_REG_SP, ///< stack pointer register 21 MOS65XX_REG_ENDING, // <-- mark the end of the list of registers 22 } mos65xx_reg; 23 24 /// MOS65XX Addressing Modes 25 typedef enum mos65xx_address_mode { 26 MOS65XX_AM_NONE = 0, ///< No address mode. 27 MOS65XX_AM_IMP, ///< implied addressing (no addressing mode) 28 MOS65XX_AM_ACC, ///< accumulator addressing 29 MOS65XX_AM_ABS, ///< absolute addressing 30 MOS65XX_AM_ZP, ///< zeropage addressing 31 MOS65XX_AM_IMM, ///< 8 Bit immediate value 32 MOS65XX_AM_ABSX, ///< indexed absolute addressing by the X index register 33 MOS65XX_AM_ABSY, ///< indexed absolute addressing by the Y index register 34 MOS65XX_AM_INDX, ///< indexed indirect addressing by the X index register 35 MOS65XX_AM_INDY, ///< indirect indexed addressing by the Y index register 36 MOS65XX_AM_ZPX, ///< indexed zeropage addressing by the X index register 37 MOS65XX_AM_ZPY, ///< indexed zeropage addressing by the Y index register 38 MOS65XX_AM_REL, ///< relative addressing used by branches 39 MOS65XX_AM_IND, ///< absolute indirect addressing 40 } mos65xx_address_mode; 41 42 /// MOS65XX instruction 43 typedef enum mos65xx_insn { 44 MOS65XX_INS_INVALID = 0, 45 MOS65XX_INS_ADC, 46 MOS65XX_INS_AND, 47 MOS65XX_INS_ASL, 48 MOS65XX_INS_BCC, 49 MOS65XX_INS_BCS, 50 MOS65XX_INS_BEQ, 51 MOS65XX_INS_BIT, 52 MOS65XX_INS_BMI, 53 MOS65XX_INS_BNE, 54 MOS65XX_INS_BPL, 55 MOS65XX_INS_BRK, 56 MOS65XX_INS_BVC, 57 MOS65XX_INS_BVS, 58 MOS65XX_INS_CLC, 59 MOS65XX_INS_CLD, 60 MOS65XX_INS_CLI, 61 MOS65XX_INS_CLV, 62 MOS65XX_INS_CMP, 63 MOS65XX_INS_CPX, 64 MOS65XX_INS_CPY, 65 MOS65XX_INS_DEC, 66 MOS65XX_INS_DEX, 67 MOS65XX_INS_DEY, 68 MOS65XX_INS_EOR, 69 MOS65XX_INS_INC, 70 MOS65XX_INS_INX, 71 MOS65XX_INS_INY, 72 MOS65XX_INS_JMP, 73 MOS65XX_INS_JSR, 74 MOS65XX_INS_LDA, 75 MOS65XX_INS_LDX, 76 MOS65XX_INS_LDY, 77 MOS65XX_INS_LSR, 78 MOS65XX_INS_NOP, 79 MOS65XX_INS_ORA, 80 MOS65XX_INS_PHA, 81 MOS65XX_INS_PLA, 82 MOS65XX_INS_PHP, 83 MOS65XX_INS_PLP, 84 MOS65XX_INS_ROL, 85 MOS65XX_INS_ROR, 86 MOS65XX_INS_RTI, 87 MOS65XX_INS_RTS, 88 MOS65XX_INS_SBC, 89 MOS65XX_INS_SEC, 90 MOS65XX_INS_SED, 91 MOS65XX_INS_SEI, 92 MOS65XX_INS_STA, 93 MOS65XX_INS_STX, 94 MOS65XX_INS_STY, 95 MOS65XX_INS_TAX, 96 MOS65XX_INS_TAY, 97 MOS65XX_INS_TSX, 98 MOS65XX_INS_TXA, 99 MOS65XX_INS_TXS, 100 MOS65XX_INS_TYA, 101 MOS65XX_INS_ENDING, // <-- mark the end of the list of instructions 102 } mos65xx_insn; 103 104 /// Group of MOS65XX instructions 105 typedef enum mos65xx_group_type { 106 MOS65XX_GRP_INVALID = 0, ///< CS_GRP_INVALID 107 MOS65XX_GRP_JUMP, ///< = CS_GRP_JUMP 108 MOS65XX_GRP_CALL, ///< = CS_GRP_RET 109 MOS65XX_GRP_RET, ///< = CS_GRP_RET 110 MOS65XX_GRP_IRET = 5, ///< = CS_GRP_IRET 111 MOS65XX_GRP_BRANCH_RELATIVE = 6, ///< = CS_GRP_BRANCH_RELATIVE 112 MOS65XX_GRP_ENDING,// <-- mark the end of the list of groups 113 } mos65xx_group_type; 114 115 /// Operand type for instruction's operands 116 typedef enum mos65xx_op_type { 117 MOS65XX_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). 118 MOS65XX_OP_REG, ///< = CS_OP_REG (Register operand). 119 MOS65XX_OP_IMM, ///< = CS_OP_IMM (Immediate operand). 120 MOS65XX_OP_MEM, ///< = CS_OP_MEM (Memory operand). 121 } mos65xx_op_type; 122 123 /// Instruction operand 124 typedef struct cs_mos65xx_op { 125 mos65xx_op_type type; ///< operand type 126 union { 127 mos65xx_reg reg; ///< register value for REG operand 128 uint8_t imm; ///< immediate value for IMM operand 129 uint16_t mem; ///< base/index/scale/disp value for MEM operand 130 }; 131 } cs_mos65xx_op; 132 133 /// The MOS65XX address mode and it's operands 134 typedef struct cs_mos65xx { 135 mos65xx_address_mode am; 136 bool modifies_flags; 137 138 /// Number of operands of this instruction, 139 /// or 0 when instruction has no operand. 140 uint8_t op_count; 141 cs_mos65xx_op operands[3]; ///< operands for this instruction. 142 } cs_mos65xx; 143 144 #ifdef __cplusplus 145 } 146 #endif 147 148 #endif //CAPSTONE_MOS65XX_H 149