1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "drm-uapi/drm_fourcc.h"
24
25 #include "pipe/p_state.h"
26 #include "pipe/p_defines.h"
27 #include "frontend/drm_driver.h"
28 #include "util/u_inlines.h"
29 #include "util/format/u_format.h"
30
31 #include "nvc0/nvc0_context.h"
32 #include "nvc0/nvc0_resource.h"
33
34 static uint32_t
nvc0_tex_choose_tile_dims(unsigned nx,unsigned ny,unsigned nz,bool is_3d)35 nvc0_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz, bool is_3d)
36 {
37 return nv50_tex_choose_tile_dims_helper(nx, ny, nz, is_3d);
38 }
39
40 static uint32_t
tu102_mt_choose_storage_type(struct nv50_miptree * mt,bool compressed)41 tu102_mt_choose_storage_type(struct nv50_miptree *mt, bool compressed)
42 {
43 uint32_t kind;
44
45 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR))
46 return 0;
47 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR))
48 return 0;
49
50 switch (mt->base.base.format) {
51 case PIPE_FORMAT_Z16_UNORM:
52 if (compressed)
53 kind = 0x0b; // NV_MMU_PTE_KIND_Z16_COMPRESSIBLE_DISABLE_PLC
54 else
55 kind = 0x01; // NV_MMU_PTE_KIND_Z16
56 break;
57 case PIPE_FORMAT_X8Z24_UNORM:
58 case PIPE_FORMAT_S8X24_UINT:
59 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
60 if (compressed)
61 kind = 0x0e; // NV_MMU_PTE_KIND_Z24S8_COMPRESSIBLE_DISABLE_PLC
62 else
63 kind = 0x05; // NV_MMU_PTE_KIND_Z24S8
64 break;
65 case PIPE_FORMAT_X24S8_UINT:
66 case PIPE_FORMAT_Z24X8_UNORM:
67 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
68 if (compressed)
69 kind = 0x0c; // NV_MMU_PTE_KIND_S8Z24_COMPRESSIBLE_DISABLE_PLC
70 else
71 kind = 0x03; // NV_MMU_PTE_KIND_S8Z24
72 break;
73 case PIPE_FORMAT_X32_S8X24_UINT:
74 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
75 if (compressed)
76 kind = 0x0d; // NV_MMU_PTE_KIND_ZF32_X24S8_COMPRESSIBLE_DISABLE_PLC
77 else
78 kind = 0x04; // NV_MMU_PTE_KIND_ZF32_X24S8
79 break;
80 case PIPE_FORMAT_Z32_FLOAT:
81 default:
82 kind = 0x06;
83 break;
84 }
85
86 return kind;
87 }
88
89 static uint32_t
nvc0_mt_choose_storage_type(struct nv50_miptree * mt,bool compressed)90 nvc0_mt_choose_storage_type(struct nv50_miptree *mt, bool compressed)
91 {
92 const unsigned ms = util_logbase2(mt->base.base.nr_samples);
93
94 uint32_t tile_flags;
95
96 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR))
97 return 0;
98 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR))
99 return 0;
100
101 switch (mt->base.base.format) {
102 case PIPE_FORMAT_Z16_UNORM:
103 if (compressed)
104 tile_flags = 0x02 + ms;
105 else
106 tile_flags = 0x01;
107 break;
108 case PIPE_FORMAT_X8Z24_UNORM:
109 case PIPE_FORMAT_S8X24_UINT:
110 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
111 if (compressed)
112 tile_flags = 0x51 + ms;
113 else
114 tile_flags = 0x46;
115 break;
116 case PIPE_FORMAT_X24S8_UINT:
117 case PIPE_FORMAT_Z24X8_UNORM:
118 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
119 if (compressed)
120 tile_flags = 0x17 + ms;
121 else
122 tile_flags = 0x11;
123 break;
124 case PIPE_FORMAT_Z32_FLOAT:
125 if (compressed)
126 tile_flags = 0x86 + ms;
127 else
128 tile_flags = 0x7b;
129 break;
130 case PIPE_FORMAT_X32_S8X24_UINT:
131 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
132 if (compressed)
133 tile_flags = 0xce + ms;
134 else
135 tile_flags = 0xc3;
136 break;
137 default:
138 switch (util_format_get_blocksizebits(mt->base.base.format)) {
139 case 128:
140 if (compressed)
141 tile_flags = 0xf4 + ms * 2;
142 else
143 tile_flags = 0xfe;
144 break;
145 case 64:
146 if (compressed) {
147 switch (ms) {
148 case 0: tile_flags = 0xe6; break;
149 case 1: tile_flags = 0xeb; break;
150 case 2: tile_flags = 0xed; break;
151 case 3: tile_flags = 0xf2; break;
152 default:
153 return 0;
154 }
155 } else {
156 tile_flags = 0xfe;
157 }
158 break;
159 case 32:
160 if (compressed && ms) {
161 switch (ms) {
162 /* This one makes things blurry:
163 case 0: tile_flags = 0xdb; break;
164 */
165 case 1: tile_flags = 0xdd; break;
166 case 2: tile_flags = 0xdf; break;
167 case 3: tile_flags = 0xe4; break;
168 default:
169 return 0;
170 }
171 } else {
172 tile_flags = 0xfe;
173 }
174 break;
175 case 16:
176 case 8:
177 tile_flags = 0xfe;
178 break;
179 default:
180 return 0;
181 }
182 break;
183 }
184
185 return tile_flags;
186 }
187
188 static inline bool
nvc0_miptree_init_ms_mode(struct nv50_miptree * mt)189 nvc0_miptree_init_ms_mode(struct nv50_miptree *mt)
190 {
191 switch (mt->base.base.nr_samples) {
192 case 8:
193 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS8;
194 mt->ms_x = 2;
195 mt->ms_y = 1;
196 break;
197 case 4:
198 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS4;
199 mt->ms_x = 1;
200 mt->ms_y = 1;
201 break;
202 case 2:
203 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS2;
204 mt->ms_x = 1;
205 break;
206 case 1:
207 case 0:
208 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS1;
209 break;
210 default:
211 NOUVEAU_ERR("invalid nr_samples: %u\n", mt->base.base.nr_samples);
212 return false;
213 }
214 return true;
215 }
216
217 static void
nvc0_miptree_init_layout_video(struct nv50_miptree * mt)218 nvc0_miptree_init_layout_video(struct nv50_miptree *mt)
219 {
220 const struct pipe_resource *pt = &mt->base.base;
221 const unsigned blocksize = util_format_get_blocksize(pt->format);
222
223 assert(pt->last_level == 0);
224 assert(mt->ms_x == 0 && mt->ms_y == 0);
225 assert(!util_format_is_compressed(pt->format));
226
227 mt->layout_3d = pt->target == PIPE_TEXTURE_3D;
228
229 mt->level[0].tile_mode = 0x10;
230 mt->level[0].pitch = align(pt->width0 * blocksize, 64);
231 mt->total_size = align(pt->height0, 16) * mt->level[0].pitch * (mt->layout_3d ? pt->depth0 : 1);
232
233 if (pt->array_size > 1) {
234 mt->layer_stride = align(mt->total_size, NVC0_TILE_SIZE(0x10));
235 mt->total_size = mt->layer_stride * pt->array_size;
236 }
237 }
238
239 static void
nvc0_miptree_init_layout_tiled(struct nv50_miptree * mt)240 nvc0_miptree_init_layout_tiled(struct nv50_miptree *mt)
241 {
242 struct pipe_resource *pt = &mt->base.base;
243 unsigned w, h, d, l;
244 const unsigned blocksize = util_format_get_blocksize(pt->format);
245
246 mt->layout_3d = pt->target == PIPE_TEXTURE_3D;
247
248 w = pt->width0 << mt->ms_x;
249 h = pt->height0 << mt->ms_y;
250
251 /* For 3D textures, a mipmap is spanned by all the layers, for array
252 * textures and cube maps, each layer contains its own mipmaps.
253 */
254 d = mt->layout_3d ? pt->depth0 : 1;
255
256 assert(!mt->ms_mode || !pt->last_level);
257
258 for (l = 0; l <= pt->last_level; ++l) {
259 struct nv50_miptree_level *lvl = &mt->level[l];
260 unsigned tsx, tsy, tsz;
261 unsigned nbx = util_format_get_nblocksx(pt->format, w);
262 unsigned nby = util_format_get_nblocksy(pt->format, h);
263
264 lvl->offset = mt->total_size;
265
266 lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d);
267
268 tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
269 tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode);
270 tsz = NVC0_TILE_SIZE_Z(lvl->tile_mode);
271
272 lvl->pitch = align(nbx * blocksize, tsx);
273
274 mt->total_size += lvl->pitch * align(nby, tsy) * align(d, tsz);
275
276 w = u_minify(w, 1);
277 h = u_minify(h, 1);
278 d = u_minify(d, 1);
279 }
280
281 if (pt->array_size > 1) {
282 mt->layer_stride = align(mt->total_size,
283 NVC0_TILE_SIZE(mt->level[0].tile_mode));
284 mt->total_size = mt->layer_stride * pt->array_size;
285 }
286 }
287
nvc0_miptree_get_modifier(struct nv50_miptree * mt)288 static uint64_t nvc0_miptree_get_modifier(struct nv50_miptree *mt)
289 {
290 union nouveau_bo_config *config = &mt->base.bo->config;
291 uint64_t modifier;
292
293 if (mt->layout_3d)
294 return DRM_FORMAT_MOD_INVALID;
295
296 switch (config->nvc0.memtype) {
297 case 0x00:
298 modifier = DRM_FORMAT_MOD_LINEAR;
299 break;
300
301 case 0xfe:
302 switch (NVC0_TILE_MODE_Y(config->nvc0.tile_mode)) {
303 case 0:
304 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_ONE_GOB;
305 break;
306
307 case 1:
308 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_TWO_GOB;
309 break;
310
311 case 2:
312 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_FOUR_GOB;
313 break;
314
315 case 3:
316 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_EIGHT_GOB;
317 break;
318
319 case 4:
320 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB;
321 break;
322
323 case 5:
324 modifier = DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB;
325 break;
326
327 default:
328 modifier = DRM_FORMAT_MOD_INVALID;
329 break;
330 }
331 break;
332
333 default:
334 modifier = DRM_FORMAT_MOD_INVALID;
335 break;
336 }
337
338 return modifier;
339 }
340
341 static bool
nvc0_miptree_get_handle(struct pipe_screen * pscreen,struct pipe_resource * pt,struct winsys_handle * whandle)342 nvc0_miptree_get_handle(struct pipe_screen *pscreen,
343 struct pipe_resource *pt,
344 struct winsys_handle *whandle)
345 {
346 struct nv50_miptree *mt = nv50_miptree(pt);
347 bool ret;
348
349 ret = nv50_miptree_get_handle(pscreen, pt, whandle);
350 if (!ret)
351 return ret;
352
353 whandle->modifier = nvc0_miptree_get_modifier(mt);
354
355 return true;
356 }
357
358 const struct u_resource_vtbl nvc0_miptree_vtbl =
359 {
360 nvc0_miptree_get_handle, /* get_handle */
361 nv50_miptree_destroy, /* resource_destroy */
362 nvc0_miptree_transfer_map, /* transfer_map */
363 u_default_transfer_flush_region, /* transfer_flush_region */
364 nvc0_miptree_transfer_unmap, /* transfer_unmap */
365 };
366
367 struct pipe_resource *
nvc0_miptree_create(struct pipe_screen * pscreen,const struct pipe_resource * templ,const uint64_t * modifiers,unsigned int count)368 nvc0_miptree_create(struct pipe_screen *pscreen,
369 const struct pipe_resource *templ,
370 const uint64_t *modifiers, unsigned int count)
371 {
372 struct nouveau_device *dev = nouveau_screen(pscreen)->device;
373 struct nouveau_drm *drm = nouveau_screen(pscreen)->drm;
374 struct nv50_miptree *mt = CALLOC_STRUCT(nv50_miptree);
375 struct pipe_resource *pt = &mt->base.base;
376 bool compressed = drm->version >= 0x01000101;
377 int ret;
378 union nouveau_bo_config bo_config;
379 uint32_t bo_flags;
380
381 if (!mt)
382 return NULL;
383
384 mt->base.vtbl = &nvc0_miptree_vtbl;
385 *pt = *templ;
386 pipe_reference_init(&pt->reference, 1);
387 pt->screen = pscreen;
388
389 if (pt->usage == PIPE_USAGE_STAGING) {
390 switch (pt->target) {
391 case PIPE_TEXTURE_2D:
392 case PIPE_TEXTURE_RECT:
393 if (pt->last_level == 0 &&
394 !util_format_is_depth_or_stencil(pt->format) &&
395 pt->nr_samples <= 1)
396 pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR;
397 break;
398 default:
399 break;
400 }
401 }
402
403 if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_LINEAR)
404 pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR;
405
406 if (pt->bind & PIPE_BIND_LINEAR)
407 pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR;
408
409 if (dev->chipset < 0x160)
410 bo_config.nvc0.memtype = nvc0_mt_choose_storage_type(mt, compressed);
411 else
412 bo_config.nvc0.memtype = tu102_mt_choose_storage_type(mt, compressed);
413
414 if (!nvc0_miptree_init_ms_mode(mt)) {
415 FREE(mt);
416 return NULL;
417 }
418
419 if (unlikely(pt->flags & NVC0_RESOURCE_FLAG_VIDEO)) {
420 nvc0_miptree_init_layout_video(mt);
421 } else
422 if (likely(bo_config.nvc0.memtype)) {
423 nvc0_miptree_init_layout_tiled(mt);
424 } else
425 if (!nv50_miptree_init_layout_linear(mt, 128)) {
426 FREE(mt);
427 return NULL;
428 }
429 bo_config.nvc0.tile_mode = mt->level[0].tile_mode;
430
431 if (!bo_config.nvc0.memtype && (pt->usage == PIPE_USAGE_STAGING || pt->bind & PIPE_BIND_SHARED))
432 mt->base.domain = NOUVEAU_BO_GART;
433 else
434 mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(pscreen));
435
436 bo_flags = mt->base.domain | NOUVEAU_BO_NOSNOOP;
437
438 if (mt->base.base.bind & (PIPE_BIND_CURSOR | PIPE_BIND_DISPLAY_TARGET))
439 bo_flags |= NOUVEAU_BO_CONTIG;
440
441 ret = nouveau_bo_new(dev, bo_flags, 4096, mt->total_size, &bo_config,
442 &mt->base.bo);
443 if (ret) {
444 FREE(mt);
445 return NULL;
446 }
447 mt->base.address = mt->base.bo->offset;
448
449 NOUVEAU_DRV_STAT(nouveau_screen(pscreen), tex_obj_current_count, 1);
450 NOUVEAU_DRV_STAT(nouveau_screen(pscreen), tex_obj_current_bytes,
451 mt->total_size);
452
453 return pt;
454 }
455
456 /* Offset of zslice @z from start of level @l. */
457 inline unsigned
nvc0_mt_zslice_offset(const struct nv50_miptree * mt,unsigned l,unsigned z)458 nvc0_mt_zslice_offset(const struct nv50_miptree *mt, unsigned l, unsigned z)
459 {
460 const struct pipe_resource *pt = &mt->base.base;
461
462 unsigned tds = NVC0_TILE_SHIFT_Z(mt->level[l].tile_mode);
463 unsigned ths = NVC0_TILE_SHIFT_Y(mt->level[l].tile_mode);
464
465 unsigned nby = util_format_get_nblocksy(pt->format,
466 u_minify(pt->height0, l));
467
468 /* to next 2D tile slice within a 3D tile */
469 unsigned stride_2d = NVC0_TILE_SIZE_2D(mt->level[l].tile_mode);
470
471 /* to slice in the next (in z direction) 3D tile */
472 unsigned stride_3d = (align(nby, (1 << ths)) * mt->level[l].pitch) << tds;
473
474 return (z & (1 << (tds - 1))) * stride_2d + (z >> tds) * stride_3d;
475 }
476
477 /* Surface functions.
478 */
479
480 struct pipe_surface *
nvc0_miptree_surface_new(struct pipe_context * pipe,struct pipe_resource * pt,const struct pipe_surface * templ)481 nvc0_miptree_surface_new(struct pipe_context *pipe,
482 struct pipe_resource *pt,
483 const struct pipe_surface *templ)
484 {
485 struct nv50_surface *ns = nv50_surface_from_miptree(nv50_miptree(pt), templ);
486 if (!ns)
487 return NULL;
488 ns->base.context = pipe;
489 return &ns->base;
490 }
491