1 /* Copyright 2020 The TensorFlow Authors. All Rights Reserved.
2 
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 
7     http://www.apache.org/licenses/LICENSE-2.0
8 
9 Unless required by applicable law or agreed to in writing, software
10 distributed under the License is distributed on an "AS IS" BASIS,
11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 See the License for the specific language governing permissions and
13 limitations under the License.
14 ==============================================================================*/
15 
16 #ifndef TENSORFLOW_COMPILER_MLIR_TENSORFLOW_UTILS_XLA_SHARDING_UTIL_H_
17 #define TENSORFLOW_COMPILER_MLIR_TENSORFLOW_UTILS_XLA_SHARDING_UTIL_H_
18 
19 #include "llvm/ADT/ArrayRef.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "mlir/IR/Builders.h"  // from @llvm-project
22 #include "mlir/IR/Operation.h"  // from @llvm-project
23 #include "mlir/IR/Types.h"  // from @llvm-project
24 #include "mlir/IR/Value.h"  // from @llvm-project
25 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
26 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
27 #include "tensorflow/compiler/xla/xla_data.pb.h"
28 #include "tensorflow/core/protobuf/tpu/compile_metadata.pb.h"
29 
30 namespace tensorflow {
31 
32 extern const char* const kInputShardingAttr;
33 extern const char* const kOutputShardingAttr;
34 
35 // Parses "input_sharding_configuration" attribute and returns a list where i-th
36 // element is a list of mlir::Value's which represent inputs for the TPU
37 // computation correponding to i-th logical device. If the attribute does not
38 // exist, the all inputs are placed on logical core 0.
39 mlir::LogicalResult ExtractInputsForLogicalDevices(
40     const int num_cores_per_replica,
41     mlir::tf_device::ClusterFuncOp cluster_func, mlir::OpBuilder* builder,
42     llvm::SmallVectorImpl<llvm::SmallVector<mlir::Value, 4>>* input_list);
43 
44 // Extracts a list of OpSharding that represent output sharding configuration of
45 // `tf_device.cluster`.
46 mlir::LogicalResult ParseAndValidateOutputSharding(
47     const int num_cores_per_replica,
48     mlir::tf_device::ClusterFuncOp cluster_func,
49     mlir::SmallVector<xla::OpSharding, 4>* output_sharding_list);
50 
51 // Retrieves output types for TPUExecute op representing execution for provided
52 // logical device id. TPUExecute op for different logical device may have
53 // different outputs depending on the output sharding configuration.
54 mlir::LogicalResult GetOutputTypesForLogicalDeviceComputation(
55     const int core_id, llvm::ArrayRef<xla::OpSharding> output_sharding_config,
56     mlir::tf_device::ClusterFuncOp cluster_func,
57     llvm::SmallVectorImpl<mlir::Type>* output_types);
58 
59 // Remaps outputs of `tf_device.parallel_execute` op that represent concurrent
60 // execution of the `tf_device.cluster_func` with its users.
61 mlir::LogicalResult RemapOutputsFromLogicalDevices(
62     const mlir::Location& location,
63     llvm::ArrayRef<xla::OpSharding> output_sharding_config,
64     mlir::tf_device::ClusterFuncOp cluster_func,
65     mlir::tf_device::ParallelExecuteOp parallel_execute,
66     mlir::OpBuilder* builder);
67 
68 // Determines each logical core argument to metadata argument index mapping,
69 // based on sharding. The return value is indexed first by logical core then by
70 // argument index.
71 llvm::SmallVector<llvm::SmallVector<int64_t, 4>, 4> GetMetadataArgumentMapping(
72     const tpu::TPUCompileMetadataProto& metadata);
73 
74 }  // namespace tensorflow
75 
76 #endif  // TENSORFLOW_COMPILER_MLIR_TENSORFLOW_UTILS_XLA_SHARDING_UTIL_H_
77