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Searched refs:shift_count (Results 1 – 5 of 5) sorted by relevance

/art/compiler/utils/x86/
Dassembler_x86.cc2670 void X86Assembler::psllw(XmmRegister reg, const Immediate& shift_count) { in psllw() argument
2671 DCHECK(shift_count.is_uint8()); in psllw()
2677 EmitUint8(shift_count.value()); in psllw()
2681 void X86Assembler::pslld(XmmRegister reg, const Immediate& shift_count) { in pslld() argument
2682 DCHECK(shift_count.is_uint8()); in pslld()
2688 EmitUint8(shift_count.value()); in pslld()
2692 void X86Assembler::psllq(XmmRegister reg, const Immediate& shift_count) { in psllq() argument
2693 DCHECK(shift_count.is_uint8()); in psllq()
2699 EmitUint8(shift_count.value()); in psllq()
2703 void X86Assembler::psraw(XmmRegister reg, const Immediate& shift_count) { in psraw() argument
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Dassembler_x86.h657 void psllw(XmmRegister reg, const Immediate& shift_count);
658 void pslld(XmmRegister reg, const Immediate& shift_count);
659 void psllq(XmmRegister reg, const Immediate& shift_count);
661 void psraw(XmmRegister reg, const Immediate& shift_count);
662 void psrad(XmmRegister reg, const Immediate& shift_count);
665 void psrlw(XmmRegister reg, const Immediate& shift_count);
666 void psrld(XmmRegister reg, const Immediate& shift_count);
667 void psrlq(XmmRegister reg, const Immediate& shift_count);
668 void psrldq(XmmRegister reg, const Immediate& shift_count);
/art/compiler/utils/x86_64/
Dassembler_x86_64.h671 void psllw(XmmRegister reg, const Immediate& shift_count);
672 void pslld(XmmRegister reg, const Immediate& shift_count);
673 void psllq(XmmRegister reg, const Immediate& shift_count);
675 void psraw(XmmRegister reg, const Immediate& shift_count);
676 void psrad(XmmRegister reg, const Immediate& shift_count);
679 void psrlw(XmmRegister reg, const Immediate& shift_count);
680 void psrld(XmmRegister reg, const Immediate& shift_count);
681 void psrlq(XmmRegister reg, const Immediate& shift_count);
682 void psrldq(XmmRegister reg, const Immediate& shift_count);
Dassembler_x86_64.cc3587 void X86_64Assembler::psllw(XmmRegister reg, const Immediate& shift_count) { in psllw() argument
3588 DCHECK(shift_count.is_uint8()); in psllw()
3595 EmitUint8(shift_count.value()); in psllw()
3599 void X86_64Assembler::pslld(XmmRegister reg, const Immediate& shift_count) { in pslld() argument
3600 DCHECK(shift_count.is_uint8()); in pslld()
3607 EmitUint8(shift_count.value()); in pslld()
3611 void X86_64Assembler::psllq(XmmRegister reg, const Immediate& shift_count) { in psllq() argument
3612 DCHECK(shift_count.is_uint8()); in psllq()
3619 EmitUint8(shift_count.value()); in psllq()
3623 void X86_64Assembler::psraw(XmmRegister reg, const Immediate& shift_count) { in psraw() argument
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/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc6279 uint32_t shift_count = DataType::SizeShift(type); in LoadFromShiftedRegOffset() local
6280 MemOperand mem_address(base, reg_index, vixl32::LSL, shift_count); in LoadFromShiftedRegOffset()
6315 uint32_t shift_count = DataType::SizeShift(type); in StoreToShiftedRegOffset() local
6316 MemOperand mem_address(base, reg_index, vixl32::LSL, shift_count); in StoreToShiftedRegOffset()