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/external/llvm-project/llvm/test/CodeGen/Thumb/
Dthumb-shrink-wrapping.ll4 …fcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumb-macho | FileCheck %s --check-prefix=DISABLE-V4T
5 …vt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumbv5-macho | FileCheck %s --check-prefix=DISABLE-V5T
73 ; DISABLE-V4T-LABEL: foo:
74 ; DISABLE-V4T: @ %bb.0:
75 ; DISABLE-V4T-NEXT: push {r7, lr}
76 ; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 8
77 ; DISABLE-V4T-NEXT: .cfi_offset lr, -4
78 ; DISABLE-V4T-NEXT: .cfi_offset r7, -8
79 ; DISABLE-V4T-NEXT: sub sp, #8
80 ; DISABLE-V4T-NEXT: .cfi_def_cfa_offset 16
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dx86-shrink-wrapping.ll4 ; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE
34 ; DISABLE-LABEL: foo:
35 ; DISABLE: ## %bb.0:
36 ; DISABLE-NEXT: pushq %rax
37 ; DISABLE-NEXT: .cfi_def_cfa_offset 16
38 ; DISABLE-NEXT: movl %edi, %eax
39 ; DISABLE-NEXT: cmpl %esi, %edi
40 ; DISABLE-NEXT: jge LBB0_2
41 ; DISABLE-NEXT: ## %bb.1: ## %true
42 ; DISABLE-NEXT: movl %eax, {{[0-9]+}}(%rsp)
[all …]
Di386-shrink-wrapping.ll3 … llc %s -o - -enable-shrink-wrap=false -no-x86-call-frame-opt | FileCheck %s --check-prefix=DISABLE
59 ; DISABLE-LABEL: eflagsLiveInPrologue:
60 ; DISABLE: ## %bb.0: ## %entry
61 ; DISABLE-NEXT: pushl %esi
62 ; DISABLE-NEXT: subl $8, %esp
63 ; DISABLE-NEXT: movl L_a$non_lazy_ptr, %eax
64 ; DISABLE-NEXT: cmpl $0, (%eax)
65 ; DISABLE-NEXT: je LBB0_2
66 ; DISABLE-NEXT: ## %bb.1: ## %if.then
67 ; DISABLE-NEXT: movb $1, _d
[all …]
Davx-vzeroupper.ll4 …riple=x86_64-unknown-unknown -mattr=+avx,-vzeroupper | FileCheck %s --check-prefixes=ALL,DISABLE-VZ
47 ; DISABLE-VZ-LABEL: test01:
48 ; DISABLE-VZ: # %bb.0:
49 ; DISABLE-VZ-NEXT: subq $56, %rsp
50 ; DISABLE-VZ-NEXT: vmovups %ymm2, (%rsp) # 32-byte Spill
51 ; DISABLE-VZ-NEXT: vmovaps {{.*}}(%rip), %xmm0
52 ; DISABLE-VZ-NEXT: callq do_sse
53 ; DISABLE-VZ-NEXT: vmovaps %xmm0, {{.*}}(%rip)
54 ; DISABLE-VZ-NEXT: callq do_sse
55 ; DISABLE-VZ-NEXT: vmovaps %xmm0, {{.*}}(%rip)
[all …]
Ddisable-tail-calls.ll2 ; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
3 ; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-F…
11 ; DISABLE-FALSE-LABEL: {{\_?}}func_attr
12 ; DISABLE-FALSE: jmp {{\_?}}callee
14 ; DISABLE-TRUE-LABEL: {{\_?}}func_attr
15 ; DISABLE-TRUE: callq {{\_?}}callee
26 ; DISABLE-FALSE-LABEL: {{\_?}}func_noattr
27 ; DISABLE-FALSE: jmp {{\_?}}callee
29 ; DISABLE-TRUE-LABEL: {{\_?}}func_noattr
30 ; DISABLE-TRUE: callq {{\_?}}callee
Dtailcc-disable-tail-calls.ll2 ; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
3 ; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-F…
11 ; DISABLE-FALSE-LABEL: {{\_?}}func_attr
12 ; DISABLE-FALSE: jmp {{\_?}}callee
14 ; DISABLE-TRUE-LABEL: {{\_?}}func_attr
15 ; DISABLE-TRUE: callq {{\_?}}callee
26 ; DISABLE-FALSE-LABEL: {{\_?}}func_noattr
27 ; DISABLE-FALSE: jmp {{\_?}}callee
29 ; DISABLE-TRUE-LABEL: {{\_?}}func_noattr
30 ; DISABLE-TRUE: callq {{\_?}}callee
/external/llvm-project/llvm/test/CodeGen/AArch64/
Darm64-shrink-wrapping.ll3 …le-shrink-wrap=false -disable-post-ra -frame-pointer=non-leaf | FileCheck %s --check-prefix=DISABLE
30 ; DISABLE-LABEL: foo:
31 ; DISABLE: ; %bb.0:
32 ; DISABLE-NEXT: sub sp, sp, #32 ; =32
33 ; DISABLE-NEXT: stp x29, x30, [sp, #16] ; 16-byte Folded Spill
34 ; DISABLE-NEXT: add x29, sp, #16 ; =16
35 ; DISABLE-NEXT: .cfi_def_cfa w29, 16
36 ; DISABLE-NEXT: .cfi_offset w30, -8
37 ; DISABLE-NEXT: .cfi_offset w29, -16
38 ; DISABLE-NEXT: cmp w0, w1
[all …]
Darm64-codegen-prepare-extload.ll3 …-cgp-ext-ld-promotion | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=DISABLE
33 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], 2
34 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
58 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], 2
59 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
96 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], %b
97 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
128 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], %b
129 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
161 ; DISABLE: add nuw i8
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Darm-shrink-wrapping.ll5 ; RUN: | FileCheck %s --check-prefix=ARM-DISABLE
9 ; RUN: | FileCheck %s --check-prefix=THUMB-DISABLE
80 ; ARM-DISABLE-LABEL: foo:
81 ; ARM-DISABLE: @ %bb.0:
82 ; ARM-DISABLE-NEXT: push {r7, lr}
83 ; ARM-DISABLE-NEXT: mov r7, sp
84 ; ARM-DISABLE-NEXT: sub sp, sp, #4
85 ; ARM-DISABLE-NEXT: cmp r0, r1
86 ; ARM-DISABLE-NEXT: bge LBB0_2
87 ; ARM-DISABLE-NEXT: @ %bb.1: @ %true
[all …]
Darm-shrink-wrapping-linux.ll3 ; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE
108 ; DISABLE-LABEL: wrongUseOfPostDominate:
109 ; DISABLE: @ %bb.0: @ %entry
110 ; DISABLE-NEXT: .save {r11, lr}
111 ; DISABLE-NEXT: push {r11, lr}
112 ; DISABLE-NEXT: cmn r1, #1
113 ; DISABLE-NEXT: ble .LBB0_7
114 ; DISABLE-NEXT: @ %bb.1: @ %while.cond.preheader
115 ; DISABLE-NEXT: cmp r1, #0
116 ; DISABLE-NEXT: beq .LBB0_6
[all …]
Ddisable-tail-calls.ll2 …lc < %s -mtriple=arm-unknown-unknown -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
3 … -mtriple=arm-unknown-unknown -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
11 ; DISABLE-FALSE-LABEL: {{\_?}}func_attr
12 ; DISABLE-FALSE: b {{\_?}}callee
14 ; DISABLE-TRUE-LABEL: {{\_?}}func_attr
15 ; DISABLE-TRUE: bl {{\_?}}callee
26 ; DISABLE-FALSE-LABEL: {{\_?}}func_noattr
27 ; DISABLE-FALSE: b {{\_?}}callee
29 ; DISABLE-TRUE-LABEL: {{\_?}}func_noattr
30 ; DISABLE-TRUE: bl {{\_?}}callee
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_memctrl.c38 mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, DISABLE),
39 mc_make_sec_cfg(AFIR, NON_SECURE, OVERRIDE, DISABLE),
40 mc_make_sec_cfg(AFIW, NON_SECURE, OVERRIDE, DISABLE),
41 mc_make_sec_cfg(NVDISPLAYR1, NON_SECURE, OVERRIDE, DISABLE),
43 mc_make_sec_cfg(VICSRD1, NON_SECURE, NO_OVERRIDE, DISABLE),
44 mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, DISABLE),
45 mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, DISABLE),
46 mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE),
47 mc_make_sec_cfg(SDMMCWAB, NON_SECURE, OVERRIDE, DISABLE),
48 mc_make_sec_cfg(AONDMAW, NON_SECURE, NO_OVERRIDE, DISABLE),
[all …]
/external/llvm/test/CodeGen/ARM/
Ddisable-tail-calls.ll2 …lc < %s -mtriple=arm-unknown-unknown -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
3 … -mtriple=arm-unknown-unknown -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
11 ; DISABLE-FALSE-LABEL: {{\_?}}func_attr
12 ; DISABLE-FALSE: b {{\_?}}callee
14 ; DISABLE-TRUE-LABEL: {{\_?}}func_attr
15 ; DISABLE-TRUE: bl {{\_?}}callee
26 ; DISABLE-FALSE-LABEL: {{\_?}}func_noattr
27 ; DISABLE-FALSE: b {{\_?}}callee
29 ; DISABLE-TRUE-LABEL: {{\_?}}func_noattr
30 ; DISABLE-TRUE: bl {{\_?}}callee
Darm-shrink-wrapping.ll4 …eCheck %s --check-prefix=CHECK --check-prefix=ARM --check-prefix=DISABLE --check-prefix=ARM-DISABLE
8 …ck %s --check-prefix=CHECK --check-prefix=THUMB --check-prefix=DISABLE --check-prefix=THUMB-DISABLE
34 ; DISABLE: sub sp
35 ; DISABLE: cmp r0, r1
36 ; DISABLE-NEXT: bge [[EXIT_LABEL:LBB[0-9_]+]]
41 ; DISABLE: str r0, [sp]
57 ; ARM-DISABLE: mov sp, r7
58 ; THUMB-DISABLE: add sp,
59 ; DISABLE-NEXT: pop {r7, pc}
95 ; ARM-DISABLE: cmp r0, #0
[all …]
/external/llvm/test/CodeGen/X86/
Ddisable-tail-calls.ll2 ; RUN: llc < %s -march x86-64 -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
3 ; RUN: llc < %s -march x86-64 -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
11 ; DISABLE-FALSE-LABEL: {{\_?}}func_attr
12 ; DISABLE-FALSE: jmp {{\_?}}callee
14 ; DISABLE-TRUE-LABEL: {{\_?}}func_attr
15 ; DISABLE-TRUE: callq {{\_?}}callee
26 ; DISABLE-FALSE-LABEL: {{\_?}}func_noattr
27 ; DISABLE-FALSE: jmp {{\_?}}callee
29 ; DISABLE-TRUE-LABEL: {{\_?}}func_noattr
30 ; DISABLE-TRUE: callq {{\_?}}callee
Dcodegen-prepare-extload.ll5 …macosx -S -disable-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=DISABLE
39 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], 2
40 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
64 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], 2
65 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
102 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], %b
103 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
134 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], %b
135 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
167 ; DISABLE: add nuw i8
[all …]
/external/llvm/test/CodeGen/Thumb/
Dthumb-shrink-wrapping.ll6 ; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE --check-prefix=DISABLE-V4T
8 ; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE --check-prefix=DISABLE-V5T
33 ; DISABLE: cmp r0, r1
34 ; DISABLE-NEXT: bge [[EXIT_LABEL:LBB[0-9_]+]]
55 ; DISABLE: add sp, #8
56 ; DISABLE-V5T-NEXT: pop {r7, pc}
57 ; DISABLE-V4T-NEXT: pop {r7}
58 ; DISABLE-V4T-NEXT: pop {r1}
59 ; DISABLE-V4T-NEXT: bx r1
92 ; DISABLE: add sp, #8
[all …]
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dppc-disable-non-volatile-cr.ll3 …N: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck --check-prefix=CHECK-DISABLE %s
9 ; CHECK-DISABLE-LABEL: DisableNonVolatileCR:
10 ; CHECK-DISABLE: # %bb.0: # %entry
11 ; CHECK-DISABLE-NOT: mfocrf [[REG1:r[0-9]+]]
12 ; CHECK-DISABLE-NOT: stw [[REG1]]
13 ; CHECK-DISABLE: stdu r1
14 ; CHECK-DISABLE-DAG: mfocrf [[REG2:r[0-9]+]]
15 ; CHECK-DISABLE-DAG: stw [[REG2]]
16 ; CHECK-DISABLE: # %bb.1: # %if.then
/external/llvm-project/llvm/test/ThinLTO/X86/
Dinternalize.ll14 … llvm-dis < %t1.bc.thinlto.internalized.bc | FileCheck %s --check-prefix=INTERNALIZE-OPTION-DISABLE
35 ; RUN: llvm-dis < %t.o.1.2.internalize.bc | FileCheck %s --check-prefix=INTERNALIZE2-OPTION-DISABLE
45 ; INTERNALIZE-OPTION-DISABLE: define void @foo
46 ; INTERNALIZE-OPTION-DISABLE: define void @bar
47 ; INTERNALIZE-OPTION-DISABLE: define weak void @linkonce_func()
48 ; INTERNALIZE-OPTION-DISABLE: define weak void @weak_func_prevailing()
49 ; INTERNALIZE-OPTION-DISABLE: define weak void @weak_func_nonprevailing()
55 ; INTERNALIZE2-OPTION-DISABLE: define dso_local void @foo
56 ; INTERNALIZE2-OPTION-DISABLE: define dso_local void @bar
57 ; INTERNALIZE2-OPTION-DISABLE: define weak dso_local void @linkonce_func()
[all …]
/external/llvm-project/llvm/test/CodeGen/BPF/
Dadjust-opt-speculative2.ll4 ; RUN: llc %t1 -o - | FileCheck -check-prefixes=CHECK-COMMON,CHECK-DISABLE %s
56 ; CHECK-DISABLE: [[REG1:r[0-9]+]] = r0
57 ; CHECK-DISABLE: [[REG1]] <<= 32
58 ; CHECK-DISABLE: [[REG1]] >>= 32
59 ; CHECK-DISABLE: r0 = [[REG6]]
60 ; CHECK-DISABLE: r0 += [[REG1]]
61 ; CHECK-DISABLE: [[REG2:r[0-9]+]] = 8
62 ; CHECK-DISABLE: if [[REG2]] > [[REG1]] goto [[LABEL:.*]]
63 ; CHECK-DISABLE: r0 = [[REG6]]
64 ; CHECK-DISABLE: [[LABEL]]:
/external/llvm-project/lld/test/ELF/
Dnew-dtags.test4 // RUN: llvm-readobj --dynamic-table %t | FileCheck --check-prefix=DISABLE %s
12 // DISABLE: DynamicSection [
13 // DISABLE: 0x000000000000000F RPATH Library rpath: [/somepath]
14 // DISABLE-NOT: RUNPATH
15 // DISABLE: ]
/external/llvm-project/lld/test/ELF/lto/
Dverify-invalid.ll6 ; RUN: -disable-verify 2>&1 | FileCheck -check-prefix=DISABLE-LPM %s
8 ; RUN: --plugin-opt=disable-verify 2>&1 | FileCheck -check-prefix=DISABLE-LPM %s
12 ; RUN: -disable-verify 2>&1 | FileCheck -check-prefix=DISABLE-NPM %s
14 ; RUN: --plugin-opt=disable-verify 2>&1 | FileCheck -check-prefix=DISABLE-NPM %s
25 ; DISABLE-LPM-NOT: Pass Arguments: {{.*}} -verify {{.*}} -verify
29 ; DISABLE-NPM-NOT: Running pass: VerifierPass
/external/llvm-project/llvm/test/Transforms/LoopUnroll/
Ddisable-full-unroll-by-opt.ll5 ; RUN: opt < %s -passes='loop-unroll<full-unroll-max=0>' -S | FileCheck %s -check-prefixes=DISABLE…
6 ; RUN: opt < %s -passes='loop-unroll<full-unroll-max=30>' -S | FileCheck %s -check-prefixes=DISABLE…
10 … %s -passes='loop-unroll' -unroll-full-max-count=0 -S | FileCheck %s -check-prefixes=DISABLE,COMMON
11 …%s -passes='loop-unroll' -unroll-full-max-count=30 -S | FileCheck %s -check-prefixes=DISABLE,COMMON
15 …oll<full-unroll-max=30>' -unroll-full-max-count=36 -S | FileCheck %s -check-prefixes=DISABLE,COMMON
30 ; DISABLE: %be = icmp slt i32 %idx, 32
/external/llvm-project/llvm/test/LTO/X86/
Dinternalize.ll10 ; RUN: llvm-dis < %t1.save.opt.merged.bc | FileCheck %s --check-prefix=INTERNALIZE-OPTION-DISABLE
22 ; RUN: llvm-dis < %t.o.0.2.internalize.bc | FileCheck %s --check-prefix=INTERNALIZE2-OPTION-DISABLE
26 ; INTERNALIZE-OPTION-DISABLE: define void @foo
27 ; INTERNALIZE-OPTION-DISABLE: define void @bar
30 ; INTERNALIZE2-OPTION-DISABLE: define dso_local void @foo
31 ; INTERNALIZE2-OPTION-DISABLE: define dso_local void @bar
/external/llvm/test/CodeGen/AArch64/
Darm64-codegen-prepare-extload.ll3 …le-ios -S -disable-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=DISABLE
33 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], 2
34 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
58 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], 2
59 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
96 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw i8 [[LD]], %b
97 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = zext i8 [[ADD]] to i32
128 ; DISABLE: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[LD]], %b
129 ; DISABLE: [[RES:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i32
161 ; DISABLE: add nuw i8
[all …]

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