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Searched refs:A53_CORE_WUP_SRC (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx8m/
Dgpc_common.c190 mmio_clrsetbits_32(IMX_GPC_BASE + LPCR_A53_BSC, A53_CORE_WUP_SRC(last_core), in imx_set_sys_wakeup()
194 A53_CORE_WUP_SRC(last_core)); in imx_set_sys_wakeup()
/external/arm-trusted-firmware/plat/imx/imx8m/include/
Dgpc.h20 #define A53_CORE_WUP_SRC(core_id) (1 << ((core_id) < 2 ? 28 + (core_id) : 22 + (core_id) - 2)) macro