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Searched refs:ABS (Results 1 – 25 of 365) sorted by relevance

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/external/libavc/encoder/
Dime_distortion_metrics.c146 pi4_sad[0] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
149 pi4_sad[1] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
152 pi4_sad[2] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
155 pi4_sad[3] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
158 pi4_sad[4] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
161 pi4_sad[5] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
164 pi4_sad[6] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
167 pi4_sad[7] += ABS(diff); in ime_sub_pel_compute_sad_16x16()
244 pi4_sad[0] += ABS(diff); in ime_calculate_sad4_prog()
247 pi4_sad[1] += ABS(diff); in ime_calculate_sad4_prog()
[all …]
/external/libavc/common/
Dih264_deblk_edge_filters.c137 if((ABS(p0 - q0) >= alpha) || in ih264_deblk_luma_vert_bs4()
138 (ABS(q1 - q0) >= beta) || in ih264_deblk_luma_vert_bs4()
139 (ABS(p1 - p0) >= beta)) in ih264_deblk_luma_vert_bs4()
147 if(ABS(p0 - q0) < ((alpha >> 2) + 2)) in ih264_deblk_luma_vert_bs4()
150 a_p = (UWORD8)ABS(p2 - p0); in ih264_deblk_luma_vert_bs4()
151 a_q = (UWORD8)ABS(q2 - q0); in ih264_deblk_luma_vert_bs4()
260 if((ABS(p0 - q0) >= alpha) || in ih264_deblk_luma_horz_bs4()
261 (ABS(q1 - q0) >= beta) || in ih264_deblk_luma_horz_bs4()
262 (ABS(p1 - p0) >= beta)) in ih264_deblk_luma_horz_bs4()
270 if(ABS(p0 - q0) < ((alpha >> 2) + 2)) in ih264_deblk_luma_horz_bs4()
[all …]
/external/llvm-project/lld/test/ELF/
Dmips-gp-ext.s26 # RUN: llvm-objdump -s -t %t.abs.so | FileCheck --check-prefix=ABS %s
29 # REL: 00000000 l *ABS* 00000000 .hidden _gp_disp
30 # REL: 000001ec l *ABS* 00000000 .hidden _gp
49 # ABS: 000000e0 l .text 00000000 foo
50 # ABS: 00000000 l *ABS* 00000000 .hidden _gp_disp
51 # ABS: 00000200 l *ABS* 00000000 .hidden _gp
53 # ABS: Contents of section .reginfo:
54 # ABS-NEXT: 0018 10000104 00000000 00000000 00000000
55 # ABS-NEXT: 0028 00000000 00000200
58 # ABS: Contents of section .text:
[all …]
/external/llvm-project/lld/test/ELF/lto/
Dlinker-script-symbols-assign.ll24 ; RUN: llvm-readobj --symbols %t3 | FileCheck %s --check-prefix=ABS
25 ; ABS: Symbol {
26 ; ABS: Name: zed
27 ; ABS-NEXT: Value: 0x1
28 ; ABS-NEXT: Size: 0
29 ; ABS-NEXT: Binding: Global
30 ; ABS-NEXT: Type: None
31 ; ABS-NEXT: Other: 0
32 ; ABS-NEXT: Section: Absolute
33 ; ABS-NEXT: }
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s107 vabd.u8 q13, q4, q3 @Q13 = ABS(p1 - p0)
109 vabd.u8 q11, q3, q0 @Q11 = ABS(p0 - q0)
111 vabd.u8 q12, q1, q0 @Q12 = ABS(q1 - q0)
118 vabd.u8 q14, q5, q3 @Q14 = Ap = ABS(p2 - p0)
119 vabd.u8 q15, q2, q0 @Q15 = Aq = ABS(q2 - q0)
122 vcge.u8 q9, q11, q10 @Q9 = ( ABS(p0 - q0) >= Alpha )
123 vcge.u8 q12, q12, q8 @Q12=( ABS(q1 - q0) >= Beta )
124 vcge.u8 q13, q13, q8 @Q13=( ABS(p1 - p0) >= Beta )
128 vorr q9, q9, q12 @Q9 = ( ABS(p0 - q0) >= Alpha ) | ( ABS(q1 - q0) >= Beta )
131 …vorr q9, q9, q13 @Q9 = ( ABS(p0 - q0) >= Alpha ) | ( ABS(q1 - q0) >= Beta ) | (…
[all …]
/external/llvm/test/CodeGen/SPARC/
Dobj-relocs.ll1 …9 -filetype=obj --relocation-model=static | llvm-readobj -r | FileCheck %s --check-prefix=CHECK-ABS
4 ;CHECK-ABS: Relocations [
5 ;CHECK-ABS: 0x{{[0-9,A-F]+}} R_SPARC_H44 AGlobalVar 0x0
6 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_M44 AGlobalVar 0x0
7 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_L44 AGlobalVar 0x0
8 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_H44 .rodata.str1.1 0x0
9 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_M44 .rodata.str1.1 0x0
10 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_WDISP30 bar 0x0
11 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_L44 .rodata.str1.1 0x0
12 ;CHECK-ABS: ]
/external/llvm-project/llvm/test/CodeGen/SPARC/
Dobj-relocs.ll1 …-filetype=obj --relocation-model=static | llvm-readobj -r - | FileCheck %s --check-prefix=CHECK-ABS
4 ;CHECK-ABS: Relocations [
5 ;CHECK-ABS: 0x{{[0-9,A-F]+}} R_SPARC_H44 AGlobalVar 0x0
6 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_M44 AGlobalVar 0x0
7 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_L44 AGlobalVar 0x0
8 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_H44 .rodata.str1.1 0x0
9 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_M44 .rodata.str1.1 0x0
10 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_WDISP30 bar 0x0
11 ;CHECK-ABS-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_L44 .rodata.str1.1 0x0
12 ;CHECK-ABS: ]
/external/libavc/decoder/
Dih264d_compute_bs.c255 u4_bs_temp1 = ((ABS((i2_p_mv0 - i2_q_mv0)) >= 4) || in ih264d_fill_bs1_16x16mb_pslice()
256 (ABS((i2_p_mv1 - i2_q_mv1)) >= i4_ver_mvlimit)); in ih264d_fill_bs1_16x16mb_pslice()
297 ((ABS((i2_p_mv0 - i2_q_mv0)) in ih264d_fill_bs1_16x16mb_pslice()
299 | (ABS((i2_p_mv1 - i2_q_mv1)) in ih264d_fill_bs1_16x16mb_pslice()
422 ((ABS((i2_left_mv0 - i2_cur_mv0)) in ih264d_fill_bs1_non16x16mb_pslice()
424 | (ABS((i2_left_mv1 in ih264d_fill_bs1_non16x16mb_pslice()
478 ((ABS((i2_top_mv0 - i2_cur_mv0)) in ih264d_fill_bs1_non16x16mb_pslice()
480 | (ABS((i2_top_mv1 in ih264d_fill_bs1_non16x16mb_pslice()
586 ((ABS((i2_p_mv0 - i2_q_mv0)) in ih264d_fill_bs1_16x16mb_bslice()
588 | (ABS((i2_p_mv1 - i2_q_mv1)) in ih264d_fill_bs1_16x16mb_bslice()
[all …]
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_reclaim_init.ld.S26 #define ABS ABSOLUTE macro
34 OFFSET = ABS(SIZEOF(.init) - (. - __STACKS_START__)); \
36 SIGN = ABS(OFFSET) & (1 << 63); \
38 MASK = ABS(SIGN >> 63) - 1; \
39 . += ABS(OFFSET) & ABS(MASK); \
/external/libhevc/common/
Dihevc_deblk_edge_filter.c137 dq0 = ABS(pu1_src[2] - 2 * pu1_src[1] + pu1_src[0]); in ihevc_deblk_luma_vert()
138 dq3 = ABS(pu1_src[3 * src_strd + 2] - 2 * pu1_src[3 * src_strd + 1] in ihevc_deblk_luma_vert()
140 dp0 = ABS(pu1_src[-3] - 2 * pu1_src[-2] + pu1_src[-1]); in ihevc_deblk_luma_vert()
141 dp3 = ABS(pu1_src[3 * src_strd - 3] - 2 * pu1_src[3 * src_strd - 2] in ihevc_deblk_luma_vert()
160 && (ABS(pu1_src[3] - pu1_src[0]) + ABS(pu1_src[-1] - pu1_src[-4]) in ihevc_deblk_luma_vert()
162 && ABS(pu1_src[0] - pu1_src[-1]) < ((5 * tc + 1) >> 1)) in ihevc_deblk_luma_vert()
170 && (ABS(pu1_src[3] - pu1_src[0]) + ABS(pu1_src[-1] - pu1_src[-4]) in ihevc_deblk_luma_vert()
172 && ABS(pu1_src[0] - pu1_src[-1]) < ((5 * tc + 1) >> 1)) in ihevc_deblk_luma_vert()
240 if(ABS(delta) < 10 * tc) in ihevc_deblk_luma_vert()
374 dq0 = ABS(pu1_src[2 * src_strd] - 2 * pu1_src[1 * src_strd] + in ihevc_deblk_luma_horz()
[all …]
Dihevc_hbd_deblk_edge_filter.c144 dq0 = ABS(pu2_src[2] - 2 * pu2_src[1] + pu2_src[0]); in ihevc_hbd_deblk_luma_vert()
145 dq3 = ABS(pu2_src[3 * src_strd + 2] - 2 * pu2_src[3 * src_strd + 1] in ihevc_hbd_deblk_luma_vert()
147 dp0 = ABS(pu2_src[-3] - 2 * pu2_src[-2] + pu2_src[-1]); in ihevc_hbd_deblk_luma_vert()
148 dp3 = ABS(pu2_src[3 * src_strd - 3] - 2 * pu2_src[3 * src_strd - 2] in ihevc_hbd_deblk_luma_vert()
167 && (ABS(pu2_src[3] - pu2_src[0]) + ABS(pu2_src[-1] - pu2_src[-4]) in ihevc_hbd_deblk_luma_vert()
169 && ABS(pu2_src[0] - pu2_src[-1]) < ((5 * tc + 1) >> 1)) in ihevc_hbd_deblk_luma_vert()
177 && (ABS(pu2_src[3] - pu2_src[0]) + ABS(pu2_src[-1] - pu2_src[-4]) in ihevc_hbd_deblk_luma_vert()
179 && ABS(pu2_src[0] - pu2_src[-1]) < ((5 * tc + 1) >> 1)) in ihevc_hbd_deblk_luma_vert()
247 if(ABS(delta) < 10 * tc) in ihevc_hbd_deblk_luma_vert()
379 dq0 = ABS(pu2_src[2 * src_strd] - 2 * pu2_src[1 * src_strd] + in ihevc_hbd_deblk_luma_horz()
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dabs-1.ll52 ; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
53 ; CHECK-NEXT: ret i8 [[ABS]]
67 ; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]]
68 ; CHECK-NEXT: ret <2 x i8> [[ABS]]
82 ; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]]
83 ; CHECK-NEXT: ret <2 x i8> [[ABS]]
97 ; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
98 ; CHECK-NEXT: ret i8 [[ABS]]
110 ; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
111 ; CHECK-NEXT: ret i8 [[ABS]]
[all …]
/external/llvm-project/lld/test/ELF/linkerscript/
Dsynthetic-symbols1.test43 # CHECK-NEXT: 0000000000000160 g *ABS* 0000000000000000 _end_sec_abs
47 # CHECK-NEXT: 0000000000000008 g *ABS* 0000000000000000 size_foo_1
48 # CHECK-NEXT: 0000000000000008 g *ABS* 0000000000000000 size_foo_1_abs
51 # CHECK-NEXT: 0000000000000eac g *ABS* 0000000000000000 size_foo_2
52 # CHECK-NEXT: 0000000000000eac g *ABS* 0000000000000000 size_foo_3
54 # CHECK-NEXT: 0000000000001010 g *ABS* 0000000000000000 __eh_frame_hdr_start2
56 # CHECK-NEXT: 0000000000001020 g *ABS* 0000000000000000 __eh_frame_hdr_end2
Dloadaddr.s21 # CHECK: 0000000000002000 g *ABS* 0000000000000000 aaa_lma
22 # CHECK-NEXT: 0000000000002008 g *ABS* 0000000000000000 bbb_lma
23 # CHECK-NEXT: 0000000000003000 g *ABS* 0000000000000000 ccc_lma
24 # CHECK-NEXT: 0000000000004000 g *ABS* 0000000000000000 ddd_lma
25 # CHECK-NEXT: 0000000000004008 g *ABS* 0000000000000000 txt_lma
Dsymbols.s28 # PROVIDE2: 0000000000000000 g *ABS* 0000000000000000 somesym
35 # HIDDEN2: 0000000000000000 g *ABS* 0000000000000000 somesym
41 # HIDDEN3: 0000000000000001 l *ABS* 0000000000000000 .hidden newsym
58 # PROVIDE5: 0000000000000000 g *ABS* 0000000000000000 somesym
65 # HIDDEN5: 0000000000000000 g *ABS* 0000000000000000 somesym
72 # SIMPLE2: 0000000000000100 g *ABS* 0000000000000000 foo
73 # SIMPLE2: 0000000000000100 g *ABS* 0000000000000000 bar
74 # SIMPLE2: 0000000000000100 g *ABS* 0000000000000000 baz
/external/XNNPACK/src/f32-vunary/
Davx512f.c.in9 $assert OP in ["ABS", "NEG", "SQR"]
20 $ "ABS": "__m512i",
25 $ "ABS": "_mm512_loadu_si512",
30 $ "ABS": "_mm512_maskz_loadu_epi32",
35 $ "ABS": "_mm512_storeu_si512",
40 $ "ABS": "_mm512_mask_storeu_epi32",
45 $ "ABS": lambda x: "_mm512_and_epi32(%s, vnonsign_mask)" % x,
50 $ "ABS": "const union xnn_f32_abs_params params[restrict XNN_MIN_ELEMENTS(1)]",
65 $if OP == "ABS":
/external/llvm-project/llvm/test/MC/RISCV/
Dpcrel-fixups.s29 # RELAX: R_RISCV_RELAX *ABS*
32 # RELAX: R_RISCV_RELAX *ABS*
45 # RELAX: R_RISCV_RELAX *ABS*
48 # RELAX: R_RISCV_RELAX *ABS*
67 # RELAX: R_RISCV_RELAX *ABS*
70 # RELAX: R_RISCV_RELAX *ABS*
84 # RELAX: R_RISCV_RELAX *ABS*
87 # RELAX: R_RISCV_RELAX *ABS*
99 # RELAX: R_RISCV_RELAX *ABS*
102 # RELAX: R_RISCV_RELAX *ABS*
/external/libhevc/encoder/
Dihevce_had_satd.c696 if(ABS(pi2_dst0[dst_idx]) > threshold) in ihevce_compute_8x8HAD_using_4x4()
698 if(ABS(pi2_dst1[dst_idx]) > threshold) in ihevce_compute_8x8HAD_using_4x4()
700 if(ABS(pi2_dst2[dst_idx]) > threshold) in ihevce_compute_8x8HAD_using_4x4()
702 if(ABS(pi2_dst3[dst_idx]) > threshold) in ihevce_compute_8x8HAD_using_4x4()
705 u4_satd += ABS(pi2_dst0[dst_idx]); in ihevce_compute_8x8HAD_using_4x4()
706 u4_satd += ABS(pi2_dst1[dst_idx]); in ihevce_compute_8x8HAD_using_4x4()
707 u4_satd += ABS(pi2_dst2[dst_idx]); in ihevce_compute_8x8HAD_using_4x4()
708 u4_satd += ABS(pi2_dst3[dst_idx]); in ihevce_compute_8x8HAD_using_4x4()
799 if(ABS(pi2_dst[0 * dst_strd + k]) < threshold) in ihevce_had4_4x4()
802 if(ABS(pi2_dst[1 * dst_strd + k]) < threshold) in ihevce_had4_4x4()
[all …]
/external/llvm-project/llvm/test/Transforms/InstSimplify/
Dabs_intrinsic.ll56 ; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[ZEXT]], i1 false)
57 ; CHECK-NEXT: ret i32 [[ABS]]
67 ; CHECK-NEXT: [[ABS:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[LSHR]], i1 true)
68 ; CHECK-NEXT: ret <3 x i82> [[ABS]]
78 ; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 true)
79 ; CHECK-NEXT: ret i32 [[ABS]]
89 ; CHECK-NEXT: [[ABS:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[SEL]], i1 false)
90 ; CHECK-NEXT: ret <3 x i82> [[ABS]]
103 ; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 true)
104 ; CHECK-NEXT: ret i32 [[ABS]]
[all …]
/external/libavc/encoder/arm/
Dime_platform_macros.h45 sad += ABS(src[0]-est[0]) + \
46 ABS(src[1]-est[1]) + \
47 ABS(src[2]-est[2]) + \
48 ABS(src[3]-est[3])
/external/libavc/encoder/x86/
Dime_platform_macros.h46 sad += ABS(src[0]-est[0]) + \
47 ABS(src[1]-est[1]) + \
48 ABS(src[2]-est[2]) + \
49 ABS(src[3]-est[3])
/external/libavc/encoder/armv8/
Dime_platform_macros.h45 sad += ABS(src[0]-est[0]) + \
46 ABS(src[1]-est[1]) + \
47 ABS(src[2]-est[2]) + \
48 ABS(src[3]-est[3])
/external/libavc/encoder/mips/
Dime_platform_macros.h46 sad += ABS(src[0]-est[0]) + \
47 ABS(src[1]-est[1]) + \
48 ABS(src[2]-est[2]) + \
49 ABS(src[3]-est[3])
/external/llvm-project/llvm/test/MC/PowerPC/
Dppc64-reloc-directive-pcrel.s28 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8
48 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0xc
74 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x1c
104 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x28
136 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x50
163 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8
187 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8
208 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0xc
233 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x1c
263 # CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x24
[all …]
/external/XNNPACK/scripts/
Dgenerate-f32-vunary.sh9 tools/xngen src/f32-vunary/scalar.c.in -D OP=ABS -D BATCH_TILE=1 -o src/f32-vunary/gen/vabs-scalar-…
10 tools/xngen src/f32-vunary/scalar.c.in -D OP=ABS -D BATCH_TILE=2 -o src/f32-vunary/gen/vabs-scalar-…
11 tools/xngen src/f32-vunary/scalar.c.in -D OP=ABS -D BATCH_TILE=4 -o src/f32-vunary/gen/vabs-scalar-…
20 tools/xngen src/f32-vunary/wasmsimd.c.in -D OP=ABS -D BATCH_TILE=4 -o src/f32-vunary/gen/vabs-wasms…
21 tools/xngen src/f32-vunary/wasmsimd.c.in -D OP=ABS -D BATCH_TILE=8 -o src/f32-vunary/gen/vabs-wasms…
28 tools/xngen src/f32-vunary/neon.c.in -D OP=ABS -D BATCH_TILE=4 -o src/f32-vunary/gen/vabs-neon-x4.c
29 tools/xngen src/f32-vunary/neon.c.in -D OP=ABS -D BATCH_TILE=8 -o src/f32-vunary/gen/vabs-neon-x8.c
36 tools/xngen src/f32-vunary/sse.c.in -D OP=ABS -D BATCH_TILE=4 -o src/f32-vunary/gen/vabs-sse-x4.c
37 tools/xngen src/f32-vunary/sse.c.in -D OP=ABS -D BATCH_TILE=8 -o src/f32-vunary/gen/vabs-sse-x8.c
44 tools/xngen src/f32-vunary/avx.c.in -D OP=ABS -D BATCH_TILE=8 -o src/f32-vunary/gen/vabs-avx-x8.c
[all …]

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