| /external/arm-trusted-firmware/lib/cpus/aarch32/ |
| D | cortex_a15.S | 28 ldcopr r0, ACTLR
30 stcopr r0, ACTLR
44 ldcopr r0, ACTLR
46 stcopr r0, ACTLR
135 ldcopr r0, ACTLR
137 stcopr r0, ACTLR
|
| D | cortex_a7.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| D | cortex_a5.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| D | cortex_a12.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| D | cortex_a9.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| D | cortex_a17.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| /external/arm-trusted-firmware/docs/security_advisories/ |
| D | security-advisory-tfv-6.rst | 110 entry into the secure world. For Cortex-A8, also set ``ACTLR[6]`` to 1 during
113 ``ACTLR[0]`` to 1 during early processor initialization, and invalidate the
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| D | core_sc000.h | 511 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm3.h | 649 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm4.h | 708 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm7.h | 910 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| D | core_sc000.h | 511 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm3.h | 649 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm4.h | 708 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| D | core_cm7.h | 910 __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ member
|
| /external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/ |
| D | device1.ini | 104 ACTLR=0x00000040 key
|
| /external/OpenCSD/decoder/tests/snapshots/trace_cov_a15/ |
| D | device1.ini | 104 ACTLR=0x00000040 key
|
| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | arch_helpers.h | 229 DEFINE_COPROCR_RW_FUNCS(actlr, ACTLR) in DEFINE_SYSREG_RW_FUNCS()
|
| D | arch.h | 498 #define ACTLR p15, 0, c1, c0, 1 macro
|
| /external/arm-trusted-firmware/docs/ |
| D | change-log.rst | 1410 - SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
|