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Searched refs:APB1ENR2 (Results 1 – 3 of 3) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h1192 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1194 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1271 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1273 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1280 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1282 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1289 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1291 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1351 #define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN)
1376 #define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h1192 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1194 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1271 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1273 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1280 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1282 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1289 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1291 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1351 #define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN)
1376 #define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h727 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member