Searched refs:ARM_INS_VRSHR (Results 1 – 7 of 7) sorted by relevance
/external/capstone/arch/ARM/ |
D | ARMMappingInsn.inc | 8351 ARM_VRSHRsv16i8, ARM_INS_VRSHR, 8357 ARM_VRSHRsv1i64, ARM_INS_VRSHR, 8363 ARM_VRSHRsv2i32, ARM_INS_VRSHR, 8369 ARM_VRSHRsv2i64, ARM_INS_VRSHR, 8375 ARM_VRSHRsv4i16, ARM_INS_VRSHR, 8381 ARM_VRSHRsv4i32, ARM_INS_VRSHR, 8387 ARM_VRSHRsv8i16, ARM_INS_VRSHR, 8393 ARM_VRSHRsv8i8, ARM_INS_VRSHR, 8399 ARM_VRSHRuv16i8, ARM_INS_VRSHR, 8405 ARM_VRSHRuv1i64, ARM_INS_VRSHR, [all …]
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D | ARMMapping.c | 688 { ARM_INS_VRSHR, "vrshr" },
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D | ARMMappingInsnOp.inc | 4177 { /* ARM_VRSHRsv16i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ 4180 { /* ARM_VRSHRsv1i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ 4183 { /* ARM_VRSHRsv2i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ 4186 { /* ARM_VRSHRsv2i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ 4189 { /* ARM_VRSHRsv4i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ 4192 { /* ARM_VRSHRsv4i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ 4195 { /* ARM_VRSHRsv8i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ 4198 { /* ARM_VRSHRsv8i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ 4201 { /* ARM_VRSHRuv16i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */ 4204 { /* ARM_VRSHRuv1i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */ [all …]
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/external/capstone/bindings/python/capstone/ |
D | arm_const.py | 673 ARM_INS_VRSHR = 371 variable
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/external/capstone/bindings/java/capstone/ |
D | Arm_const.java | 676 public static final int ARM_INS_VRSHR = 371; field in Arm_const
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/external/capstone/include/capstone/ |
D | arm.h | 816 ARM_INS_VRSHR, enumerator
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/external/capstone/arch/AArch64/ |
D | ARMMappingInsnOp.inc | 4177 { /* ARM_VRSHRsv16i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ 4180 { /* ARM_VRSHRsv1i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ 4183 { /* ARM_VRSHRsv2i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ 4186 { /* ARM_VRSHRsv2i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */ 4189 { /* ARM_VRSHRsv4i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ 4192 { /* ARM_VRSHRsv4i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */ 4195 { /* ARM_VRSHRsv8i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */ 4198 { /* ARM_VRSHRsv8i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */ 4201 { /* ARM_VRSHRuv16i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */ 4204 { /* ARM_VRSHRuv1i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */ [all …]
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