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Searched refs:ARM_PWR_LVL1 (Results 1 – 13 of 13) sorted by relevance

/external/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_pm.c40 ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
113 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_power_domain_on_finish_common()
204 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_pwr_domain_off()
245 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_pwr_domain_suspend()
342 if ((power_level != ARM_PWR_LVL0) && (power_level != ARM_PWR_LVL1)) in fvp_node_hw_state()
/external/arm-trusted-firmware/plat/arm/css/common/
Dcss_pm.c37 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
38 #if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1
51 CASSERT(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL1,
/external/arm-trusted-firmware/plat/arm/board/sgi575/include/
Dplatform_def.h27 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/plat/arm/board/rdv1mc/include/
Dplatform_def.h21 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/plat/arm/board/rdn1edge/include/
Dplatform_def.h27 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/plat/arm/board/rdv1/include/
Dplatform_def.h22 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/plat/arm/board/rdn2/include/
Dplatform_def.h22 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/include/plat/arm/css/common/
Dcss_pm.h17 #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1]
/external/arm-trusted-firmware/drivers/arm/css/scp/
Dcss_pm_scpi.c83 if (power_level != ARM_PWR_LVL0 && power_level != ARM_PWR_LVL1) in css_scp_get_power_state()
Dcss_pm_scmi.c142 for (lvl = ARM_PWR_LVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in css_scp_suspend()
/external/arm-trusted-firmware/plat/arm/board/tc0/include/
Dplatform_def.h212 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
/external/arm-trusted-firmware/plat/arm/board/corstone700/common/include/
Dplatform_def.h146 #define ARM_PWR_LVL1 MPIDR_AFFLVL1 macro
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h40 #define ARM_PWR_LVL1 MPIDR_AFFLVL1 macro