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Searched refs:ARM_SYS_CNTCTL_BASE (Results 1 – 11 of 11) sorted by relevance

/external/arm-trusted-firmware/plat/arm/common/
Darm_common.c174 #ifdef ARM_SYS_CNTCTL_BASE
181 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
Darm_bl31_setup.c256 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in arm_bl31_platform_setup()
/external/arm-trusted-firmware/plat/arm/common/sp_min/
Darm_sp_min_setup.c199 #ifdef ARM_SYS_CNTCTL_BASE in sp_min_platform_setup()
200 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in sp_min_platform_setup()
/external/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_bl31_setup.c97 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
Dfvp_common.c459 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in fvp_timer_init()
/external/arm-trusted-firmware/plat/arm/board/corstone700/common/include/
Dplatform_def.h127 #define ARM_SYS_CNTCTL_BASE UL(0x1a200000) macro
/external/arm-trusted-firmware/plat/renesas/common/aarch64/
Dplatform_common.c207 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
/external/arm-trusted-firmware/plat/renesas/common/include/
Drcar_def.h203 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE macro
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h315 #define ARM_SYS_CNTCTL_BASE UL(0x2a430000) macro
/external/arm-trusted-firmware/plat/renesas/rzg/
Dbl2_plat_setup.c905 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()
/external/arm-trusted-firmware/plat/renesas/rcar/
Dbl2_plat_setup.c1080 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()