| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 626 COMPARE_T32(Adcs(r0, r0, Operand(r2, LSR, r3)), in TEST()
1527 COMPARE_BOTH(Adcs(r0, r1, -2), "sbcs r0, r1, #1\n"); in TEST()
2603 COMPARE_A32(Adcs(pc, r0, 1), "adcs pc, r0, #1\n"); in TEST()
2604 COMPARE_A32(Adcs(r0, pc, 1), "adcs r0, pc, #1\n"); in TEST()
2605 MUST_FAIL_TEST_T32(Adcs(pc, r0, 1), "Unpredictable instruction.\n"); in TEST()
2606 MUST_FAIL_TEST_T32(Adcs(r0, pc, 1), "Unpredictable instruction.\n"); in TEST()
2615 COMPARE_A32(Adcs(pc, r0, r1), "adcs pc, r0, r1\n"); in TEST()
2616 COMPARE_A32(Adcs(r0, pc, r1), "adcs r0, pc, r1\n"); in TEST()
2617 COMPARE_A32(Adcs(r0, r1, pc), "adcs r0, r1, pc\n"); in TEST()
2618 MUST_FAIL_TEST_T32(Adcs(pc, r0, r1), "Unpredictable instruction.\n"); in TEST()
[all …]
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| D | test-assembler-aarch32.cc | 296 __ Adcs(r3, r2, r1); in TEST() local
311 __ Adcs(r3, r2, Operand(r1, ASR, 31)); in TEST() local
326 __ Adcs(r3, r2, Operand(r1, LSR, 31)); in TEST() local
341 __ Adcs(r3, r2, Operand(r1, LSL, 4)); in TEST() local
356 __ Adcs(r3, r2, Operand(r1, ROR, 8)); in TEST() local
371 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
386 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
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| D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-const-a32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-const-t32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 117 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 117 M(Adcs) \
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 4993 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
4999 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
5183 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
5189 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
5350 __ Adcs(x10, x0, Operand(x1, SXTX, 1)); in TEST() local
5364 __ Adcs(x10, x0, Operand(x1, UXTB, 2)); in TEST() local
5377 __ Adcs(x10, x0, Operand(1)); in TEST() local
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| D | test-disasm-aarch64.cc | 2791 COMPARE_MACRO(Adcs(x0, xzr, Operand(w1, SXTW)), in TEST()
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1817 void MacroAssembler::Adcs(const Register& rd, in Adcs() function in vixl::aarch64::MacroAssembler
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| D | macro-assembler-aarch64.h | 763 void Adcs(const Register& rd, const Register& rn, const Operand& operand);
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 1019 Adcs(cond, rd, rn, operand); in Adc()
1026 Adcs(cond, rd, rn, operand); in Adc()
1040 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in Adcs() function
1050 void Adcs(Register rd, Register rn, const Operand& operand) { in Adcs() function
1051 Adcs(al, rd, rn, operand); in Adcs()
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