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Searched refs:AddRHS (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DPatternMatch.h1657 Value *AddLHS, *AddRHS; in match() local
1658 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1662 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1663 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1667 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1668 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
1675 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
1676 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1680 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
1681 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/external/llvm-project/llvm/include/llvm/IR/
DPatternMatch.h1896 Value *AddLHS, *AddRHS; in match() local
1897 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1901 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1902 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1906 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1907 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
1927 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
1928 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1932 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
1933 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/external/llvm/include/llvm/IR/
DPatternMatch.h1128 Value *AddLHS, *AddRHS; in match() local
1129 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1133 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1134 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1138 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1139 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/external/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp2205 ConstantInt *AddRHS = nullptr; in visitSwitchInst() local
2206 if (match(Cond, m_Add(m_Value(), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2218 Constant *NewCaseVal = ConstantExpr::getSub(LHS, AddRHS); in visitSwitchInst()
DInstCombineAndOrXor.cpp202 const APInt& AddRHS = OpRHS->getValue(); in OptAndOp() local
205 if ((AddRHS & (AndRHSV-1)) == 0) { in OptAndOp()
210 if ((AddRHS & AndRHSV) == 0) { // Bit is not set, noop in OptAndOp()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp2645 ConstantInt *AddRHS; in visitSwitchInst() local
2646 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2649 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
DInstCombineAndOrXor.cpp137 const APInt& AddRHS = OpRHS->getValue(); in OptAndOp() local
140 if ((AddRHS & (AndRHSV - 1)).isNullValue()) { in OptAndOp()
145 if ((AddRHS & AndRHSV).isNullValue()) { // Bit is not set, noop in OptAndOp()
/external/llvm-project/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp2918 ConstantInt *AddRHS; in visitSwitchInst() local
2919 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2922 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
/external/llvm/lib/Analysis/
DScalarEvolution.cpp8392 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
8393 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
8394 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
8397 return AddRHS->getOperand(1); in MatchNotExpr()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp9525 SDValue AddRHS = RHS; in performAddCombine() local
9532 AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
9533 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine()
9539 AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
9540 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp10278 SDValue AddRHS = RHS; in performAddCombine() local
10285 AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
10286 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine()
10292 AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
10293 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
DScalarEvolution.cpp3972 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
3973 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
3974 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
3977 return AddRHS->getOperand(1); in MatchNotExpr()
/external/llvm-project/llvm/lib/Analysis/
DScalarEvolution.cpp3932 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
3933 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
3934 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
3937 return AddRHS->getOperand(1); in MatchNotExpr()