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Searched refs:ArgGPRs (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h20 extern const MCPhysReg ArgGPRs[NumArgGPRs];
111 unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs); in CC_SystemZ_I128Indirect()
DSystemZCallingConv.cpp15 const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = { member in SystemZ
DSystemZFrameLowering.cpp82 SavedRegs.set(SystemZ::ArgGPRs[I]); in determineCalleeSaves()
171 unsigned Reg = SystemZ::ArgGPRs[FirstGPR]; in spillCalleeSavedRegisters()
204 addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true); in spillCalleeSavedRegisters()
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h19 extern const MCPhysReg ArgGPRs[NumArgGPRs];
110 unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs); in CC_SystemZ_I128Indirect()
DSystemZCallingConv.cpp14 const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = { member in SystemZ
DSystemZFrameLowering.cpp103 unsigned Reg = SystemZ::ArgGPRs[FirstGPR]; in assignCalleeSavedSpillSlots()
150 SavedRegs.set(SystemZ::ArgGPRs[I]); in determineCalleeSaves()
238 addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true); in spillCalleeSavedRegisters()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h19 extern const MCPhysReg ArgGPRs[NumArgGPRs];
110 unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs); in CC_SystemZ_I128Indirect()
DSystemZCallingConv.cpp14 const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = { member in SystemZ
DSystemZFrameLowering.cpp116 unsigned Reg = SystemZ::ArgGPRs[FirstGPR]; in assignCalleeSavedSpillSlots()
188 SavedRegs.set(SystemZ::ArgGPRs[I]); in determineCalleeSaves()
278 addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true); in spillCalleeSavedRegisters()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp1407 static const MCPhysReg ArgGPRs[] = { variable
1427 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
1444 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
1522 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV()
1524 if (RegIdx != array_lengthof(ArgGPRs) && RegIdx % 2 == 1) in CC_RISCV()
1525 State.AllocateReg(ArgGPRs); in CC_RISCV()
1544 Register Reg = State.AllocateReg(ArgGPRs); in CC_RISCV()
1552 if (!State.AllocateReg(ArgGPRs)) in CC_RISCV()
1592 Reg = State.AllocateReg(ArgGPRs); in CC_RISCV()
1956 ArrayRef<MCPhysReg> ArgRegs = makeArrayRef(ArgGPRs); in LowerFormalArguments()
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/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp2025 static const MCPhysReg ArgGPRs[] = { variable
2049 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
2067 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
2147 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV()
2149 if (RegIdx != array_lengthof(ArgGPRs) && RegIdx % 2 == 1) in CC_RISCV()
2150 State.AllocateReg(ArgGPRs); in CC_RISCV()
2169 Register Reg = State.AllocateReg(ArgGPRs); in CC_RISCV()
2177 if (!State.AllocateReg(ArgGPRs)) in CC_RISCV()
2219 Reg = State.AllocateReg(ArgGPRs); in CC_RISCV()
2653 ArrayRef<MCPhysReg> ArgRegs = makeArrayRef(ArgGPRs); in LowerFormalArguments()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp3539 ArrayRef<MCPhysReg> ArgGPRs = get64BitArgumentGPRs(CallConv, Subtarget); in LowerFormalArguments() local
3541 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in LowerFormalArguments()
3550 for (MCPhysReg Reg : ArgGPRs.slice(NumIntRegs)) { in LowerFormalArguments()
3579 FuncInfo->setVarArgsFPOffset(ArgGPRs.size() * 8 + NumXMMRegs * 16); in LowerFormalArguments()
3581 ArgGPRs.size() * 8 + ArgXMMs.size() * 16, 16, false)); in LowerFormalArguments()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.cpp3429 ArrayRef<MCPhysReg> ArgGPRs = get64BitArgumentGPRs(CallConv, Subtarget); in createVarArgAreaAndStoreRegisters() local
3432 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in createVarArgAreaAndStoreRegisters()
3452 FuncInfo->setVarArgsFPOffset(ArgGPRs.size() * 8 + NumXMMRegs * 16); in createVarArgAreaAndStoreRegisters()
3454 ArgGPRs.size() * 8 + ArgXMMs.size() * 16, Align(16), false)); in createVarArgAreaAndStoreRegisters()
3464 for (MCPhysReg Reg : ArgGPRs.slice(NumIntRegs)) { in createVarArgAreaAndStoreRegisters()