Searched refs:B12 (Results 1 – 25 of 100) sorted by relevance
1234
24 br label %B1226 B12:40 br label %B12
12 %B12 = and i8 %L13, %L1013 %B35 = and i8 %B12, %L1016 %B38 = urem i8 %B35, %B12
13 // CHECK: def B1229 def B12 : A<12>;
16 // CHECK: def B12 {
26 # GOT: {{.*}} [[B12:[0-9a-f]+]] {{.*}} b1244 # GOT-NEXT: {{.*}} -32712(gp) [[B12]]
46 …"."), B10('B', 10, "/"), B11('B', 11, "(key to right of /)"), B12('B', 12, "(2 keys to right of /)… enumConstant
38 ; CHECK: %polly.access.B12 = getelementptr float, float* %B, i64 %pexp.div53 ; POW2: %polly.access.B12 = getelementptr float, float* %B, i64 %pexp.div
16 %B12 = shl i64 %B, %B
598 (static_cast<int32_t>(rt)*B12) | B11 | B9 |614 (static_cast<int32_t>(rt)*B12) | B11 | B9 |634 (static_cast<int32_t>(rt) * B12) | B11 | B9 | in vmovsrr()655 (static_cast<int32_t>(rt) * B12) | B11 | B9 | in vmovrrs()674 (static_cast<int32_t>(rt)*B12) | B11 | B9 | B8 |695 (static_cast<int32_t>(rt)*B12) | B11 | B9 | B8 |717 (static_cast<int32_t>(rt)*B12) | B11 | B9 | B8 |731 ((static_cast<int32_t>(sd) >> 1)*B12) |745 ((static_cast<int32_t>(sd) >> 1)*B12) |757 ((static_cast<int32_t>(dd) & 0xf)*B12) |[all …]
124 case AArch64::D12: return AArch64::B12; in getBRegFromDReg()164 case AArch64::B12: return AArch64::D12; in getDRegFromBReg()
228 def B12 : AArch64Reg<12, "b12">, DwarfRegNum<[76]>;262 def H12 : AArch64Reg<12, "h12", [B12]>, DwarfRegAlias<B12>;297 def S12 : AArch64Reg<12, "s12", [H12]>, DwarfRegAlias<B12>;332 def D12 : AArch64Reg<12, "d12", [S12], ["v12", ""]>, DwarfRegAlias<B12>;367 def Q12 : AArch64Reg<12, "q12", [D12], ["v12", ""]>, DwarfRegAlias<B12>;
123 case AArch64::D12: return AArch64::B12; in getBRegFromDReg()163 case AArch64::B12: return AArch64::D12; in getDRegFromBReg()
15 …41*85.A;0I@2LA1^C3�B2�C8�CF�>B�?=�?-�@,�@+�>-�=+�>,�@3�D7i>394372/41-/0-3--B12�PP�t�XU�[Vg��~dd[--…
264 def B12 : AArch64Reg<12, "b12">, DwarfRegNum<[76]>;298 def H12 : AArch64Reg<12, "h12", [B12]>, DwarfRegAlias<B12>;333 def S12 : AArch64Reg<12, "s12", [H12]>, DwarfRegAlias<B12>;368 def D12 : AArch64Reg<12, "d12", [S12], ["v12", ""]>, DwarfRegAlias<B12>;403 def Q12 : AArch64Reg<12, "q12", [D12], ["v12", ""]>, DwarfRegAlias<B12>;
261 def B12 : AArch64Reg<12, "b12">, DwarfRegNum<[76]>;295 def H12 : AArch64Reg<12, "h12", [B12]>, DwarfRegAlias<B12>;330 def S12 : AArch64Reg<12, "s12", [H12]>, DwarfRegAlias<B12>;365 def D12 : AArch64Reg<12, "d12", [S12], ["v12", ""]>, DwarfRegAlias<B12>;400 def Q12 : AArch64Reg<12, "q12", [D12], ["v12", ""]>, DwarfRegAlias<B12>;
300 %B12 = extractelement <16 x float> %B, i32 12301 %sub12 = fsub float %A12, %B12569 %B12 = extractelement <16 x float> %B, i32 12570 %sub12 = fadd float %A12, %B12
551 %B12 = lshr i32 %B7, %and1552 %C1 = icmp ult i32 %and1, %B12554 %cmp2 = icmp eq i32 0, %B12
116 message B12 {} message
83 B12=0x00000000 key
791 1B12=1B11 1B351828 FACD>9B122423 2FA0A>9B12
45 …C11, C12, C13, B00, B01, B02, B03, B04, B05, B06, B07, B08, B09, B10, B11, B12, B13, A00, A01, A02… enumConstant
104 0B11..0B12; ; UNASSIGNED
112 0B11..0B12; ; UNASSIGNED