| /external/llvm-project/llvm/test/MC/Sparc/ |
| D | sparc-ctrl-instructions.s | 47 ! CHECK: ba .BB0 ! encoding: [0x10,0b10AAAAAA,A,A]
48 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
49 ba .BB0
51 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
52 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
53 bne .BB0
55 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
56 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
57 bnz .BB0
59 ! CHECK: be .BB0 ! encoding: [0x02,0b10AAAAAA,A,A]
[all …]
|
| D | sparc64-ctrl-instructions.s | 4 ! CHECK: bne %xcc, .BB0 ! encoding: [0x12,0b01101AAA,A,A]
5 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
6 bne %xcc, .BB0
8 ! CHECK: be %xcc, .BB0 ! encoding: [0x02,0b01101AAA,A,A]
9 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
10 be %xcc, .BB0
12 ! CHECK: bg %xcc, .BB0 ! encoding: [0x14,0b01101AAA,A,A]
13 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
14 bg %xcc, .BB0
16 ! CHECK: ble %xcc, .BB0 ! encoding: [0x04,0b01101AAA,A,A]
[all …]
|
| D | sparc-little-endian.s | 5 .BB0: label
15 ! CHECK: ba .BB0 ! encoding: [A,A,0b10AAAAAA,0x10]
16 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
18 ba .BB0
|
| /external/llvm/test/MC/Sparc/ |
| D | sparc-ctrl-instructions.s | 47 ! CHECK: ba .BB0 ! encoding: [0x10,0b10AAAAAA,A,A]
48 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
49 ba .BB0
51 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
52 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
53 bne .BB0
55 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
56 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
57 bnz .BB0
59 ! CHECK: be .BB0 ! encoding: [0x02,0b10AAAAAA,A,A]
[all …]
|
| D | sparc64-ctrl-instructions.s | 4 ! CHECK: bne %xcc, .BB0 ! encoding: [0x12,0b01101AAA,A,A]
5 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
6 bne %xcc, .BB0
8 ! CHECK: be %xcc, .BB0 ! encoding: [0x02,0b01101AAA,A,A]
9 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
10 be %xcc, .BB0
12 ! CHECK: bg %xcc, .BB0 ! encoding: [0x14,0b01101AAA,A,A]
13 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
14 bg %xcc, .BB0
16 ! CHECK: ble %xcc, .BB0 ! encoding: [0x04,0b01101AAA,A,A]
[all …]
|
| D | sparc-little-endian.s | 5 .BB0: label
15 ! CHECK: ba .BB0 ! encoding: [A,A,0b10AAAAAA,0x10]
16 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
18 ba .BB0
|
| /external/llvm-project/llvm/unittests/Analysis/ |
| D | DomTreeUpdaterTest.cpp | 67 BasicBlock *BB0 = &*FI++; in TEST() local
71 SwitchInst *SI = dyn_cast<SwitchInst>(BB0->getTerminator()); in TEST()
75 {{DominatorTree::Insert, BB0, BB0}, {DominatorTree::Delete, BB0, BB0}}); in TEST()
82 Updates.push_back({DominatorTree::Delete, BB0, BB3}); in TEST()
83 Updates.push_back({DominatorTree::Delete, BB0, BB3}); in TEST()
88 Updates.push_back({DominatorTree::Delete, BB0, BB1}); in TEST()
91 EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 3u); in TEST()
92 BB3->removePredecessor(BB0); in TEST()
99 EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 2u); in TEST()
111 {{DominatorTree::Insert, BB1, BB2}, {DominatorTree::Delete, BB0, BB1}}); in TEST()
[all …]
|
| D | ProfileSummaryInfoTest.cpp | 142 BasicBlock &BB0 = F->getEntryBlock(); in TEST_F() local
143 BasicBlock *BB1 = BB0.getTerminator()->getSuccessor(0); in TEST_F()
146 EXPECT_FALSE(PSI.isHotBlock(&BB0, &BFI)); in TEST_F()
147 EXPECT_FALSE(PSI.isColdBlock(&BB0, &BFI)); in TEST_F()
202 BasicBlock &BB0 = F->getEntryBlock(); in TEST_F() local
203 BasicBlock *BB1 = BB0.getTerminator()->getSuccessor(0); in TEST_F()
204 BasicBlock *BB2 = BB0.getTerminator()->getSuccessor(1); in TEST_F()
208 EXPECT_TRUE(PSI.isHotBlock(&BB0, &BFI)); in TEST_F()
213 EXPECT_TRUE(PSI.isHotBlockNthPercentile(990000, &BB0, &BFI)); in TEST_F()
218 EXPECT_FALSE(PSI.isColdBlockNthPercentile(990000, &BB0, &BFI)); in TEST_F()
[all …]
|
| D | BlockFrequencyInfoTest.cpp | 64 BasicBlock &BB0 = F->getEntryBlock(); in TEST_F() local
65 BasicBlock *BB1 = BB0.getTerminator()->getSuccessor(0); in TEST_F()
66 BasicBlock *BB2 = BB0.getTerminator()->getSuccessor(1); in TEST_F()
69 uint64_t BB0Freq = BFI.getBlockFreq(&BB0).getFrequency(); in TEST_F()
78 EXPECT_EQ(BFI.getBlockProfileCount(&BB0).getValue(), UINT64_C(100)); in TEST_F()
87 BFI.setBlockFreqAndScale(&BB0, BB0Freq * 2, BlocksToScale); in TEST_F()
88 EXPECT_EQ(BFI.getBlockFreq(&BB0).getFrequency(), 2 * BB0Freq); in TEST_F()
|
| /external/llvm/unittests/IR/ |
| D | DominatorTreeTest.cpp | 36 BasicBlock *BB0 = &*FI++; in runOnFunction() local
37 BasicBlock::iterator BBI = BB0->begin(); in runOnFunction()
61 EXPECT_TRUE(DT->isReachableFromEntry(BB0)); in runOnFunction()
68 EXPECT_TRUE(DT->dominates(BB0, BB0)); in runOnFunction()
69 EXPECT_TRUE(DT->dominates(BB0, BB1)); in runOnFunction()
70 EXPECT_TRUE(DT->dominates(BB0, BB2)); in runOnFunction()
71 EXPECT_TRUE(DT->dominates(BB0, BB3)); in runOnFunction()
72 EXPECT_TRUE(DT->dominates(BB0, BB4)); in runOnFunction()
74 EXPECT_FALSE(DT->dominates(BB1, BB0)); in runOnFunction()
80 EXPECT_FALSE(DT->dominates(BB2, BB0)); in runOnFunction()
[all …]
|
| /external/llvm-project/llvm/test/Transforms/SCCP/ |
| D | indirectbr.ll | 7 ; Make sure we can eliminate what is in BB0 as we know that the indirectbr is going to BB1.
18 indirectbr i8* blockaddress(@indbrtest1, %BB1), [label %BB0, label %BB1]
19 BB0:
27 ; Make sure we can eliminate what is in BB0 as we know that the indirectbr is going to BB1
43 indirectbr i8* %b, [label %BB0, label %BB1]
44 BB0:
52 ; Make sure we can not eliminate BB0 as we do not know the target of the indirectbr.
58 ; CHECK-NEXT: indirectbr i8* [[T]], [label [[BB0:%.*]], label %BB1]
59 ; CHECK: BB0:
68 indirectbr i8* %t, [label %BB0, label %BB1]
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | atomic.ll | 37 ; O0: $[[BB0:[A-Z_0-9]+]]:
41 ; ALL: $[[BB0:[A-Z_0-9]+]]:
45 ; NOT-MICROMIPS: beqz $[[R4]], $[[BB0]]
46 ; MICROMIPS: beqzc $[[R4]], $[[BB0]]
47 ; MIPSR6: beqzc $[[R4]], $[[BB0]]
62 ; ALL: $[[BB0:[A-Z_0-9]+]]:
67 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
68 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
69 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
85 ; ALL: $[[BB0:[A-Z_0-9]+]]:
[all …]
|
| D | octeon.ll | 94 ; OCTEON: bbit0 $4, 3, $[[BB0:BB[0-9_]+]]
96 ; MIPS64: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
110 ; OCTEON: bbit032 $4, 3, $[[BB0:BB[0-9_]+]]
114 ; MIPS64: bnez $[[T2]], $[[BB0:BB[0-9_]+]]
128 ; OCTEON: bbit1 $4, 3, $[[BB0:BB[0-9_]+]]
130 ; MIPS64: beqz $[[T0]], $[[BB0:BB[0-9_]+]]
144 ; OCTEON: bbit132 $4, 3, $[[BB0:BB[0-9_]+]]
148 ; MIPS64: beqz $[[T2]], $[[BB0:BB[0-9_]+]]
|
| /external/llvm-project/llvm/unittests/IR/ |
| D | DominatorTreeTest.cpp | 110 BasicBlock *BB0 = &*FI++; in TEST() local
111 BasicBlock::iterator BBI = BB0->begin(); in TEST()
135 EXPECT_TRUE(DT->isReachableFromEntry(BB0)); in TEST()
142 EXPECT_TRUE(DT->dominates(BB0, BB0)); in TEST()
143 EXPECT_TRUE(DT->dominates(BB0, BB1)); in TEST()
144 EXPECT_TRUE(DT->dominates(BB0, BB2)); in TEST()
145 EXPECT_TRUE(DT->dominates(BB0, BB3)); in TEST()
146 EXPECT_TRUE(DT->dominates(BB0, BB4)); in TEST()
148 EXPECT_FALSE(DT->dominates(BB1, BB0)); in TEST()
154 EXPECT_FALSE(DT->dominates(BB2, BB0)); in TEST()
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | select-int.ll | 38 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
39 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
42 ; M2-M3: [[BB0]]:
74 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
75 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
78 ; M2-M3: [[BB0]]:
110 ; M2: bnez $[[T0]], [[BB0:\$BB[0-9_]+]]
111 ; M3: bnez $[[T0]], [[BB0:\.LBB[0-9_]+]]
114 ; M2-M3: [[BB0]]:
147 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
[all …]
|
| /external/llvm-project/llvm/test/Transforms/SimplifyCFG/ |
| D | indirectbr.ll | 6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0]
47 BB0:
[all …]
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| D | indirectbr.ll | 6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0]
47 BB0:
[all …]
|
| /external/llvm/test/Transforms/ConstProp/ |
| D | phi.ll | 7 BB0:
10 BB1: ; preds = %BB0
13 BB3: ; preds = %BB1, %BB0
14 %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
|
| /external/llvm-project/llvm/test/Transforms/InstSimplify/ConstProp/ |
| D | phi.ll | 7 BB0:
10 BB1: ; preds = %BB0
13 BB3: ; preds = %BB1, %BB0
14 %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
|
| /external/llvm/unittests/Analysis/ |
| D | BlockFrequencyInfoTest.cpp | 65 BasicBlock &BB0 = F->getEntryBlock(); in TEST_F() local
66 BasicBlock *BB1 = BB0.getTerminator()->getSuccessor(0); in TEST_F()
67 BasicBlock *BB2 = BB0.getTerminator()->getSuccessor(1); in TEST_F()
70 uint64_t BB0Freq = BFI.getBlockFreq(&BB0).getFrequency(); in TEST_F()
79 EXPECT_EQ(BFI.getBlockProfileCount(&BB0).getValue(), UINT64_C(100)); in TEST_F()
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | select-int.ll | 38 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
41 ; M2-M3: $[[BB0]]:
73 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
76 ; M2-M3: $[[BB0]]:
108 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
111 ; M2-M3: $[[BB0]]:
143 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
146 ; M2: $[[BB0]]:
173 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
176 ; M3: $[[BB0]]:
[all …]
|
| D | select-dbl.ll | 37 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
42 ; M2: $[[BB0]]:
61 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
64 ; M3: $[[BB0]]:
92 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
95 ; M2: $[[BB0]]:
109 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
112 ; M3: $[[BB0]]:
138 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
142 ; M2-M3: $[[BB0]]:
[all …]
|
| D | select-flt.ll | 37 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
42 ; M2-M3: $[[BB0]]:
79 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
83 ; M2-M3: $[[BB0]]:
115 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
119 ; M2-M3: $[[BB0]]:
152 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
156 ; M2-M3: $[[BB0]]:
189 ; M2-M3: bc1f $[[BB0:BB[0-9_]+]]
193 ; M2-M3: $[[BB0]]:
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | octeon.ll | 95 ; OCTEON: bbit1 $4, 3, [[BB0:(\$|\.L)BB[0-9_]+]]
99 ; MIPS64: bnez $[[T0]], [[BB0:(\$|\.L)BB[0-9_]+]]
113 ; OCTEON: bbit132 $4, 3, [[BB0:(\$|\.L)BB[0-9_]+]]
119 ; MIPS64: bnez $[[T2]], [[BB0:(\$|\.L)BB[0-9_]+]]
133 ; OCTEON: bbit0 $4, 3, [[BB0:(\$|\.L)BB[0-9_]+]]
137 ; MIPS64: beqz $[[T0]], [[BB0:(\$|\.L)BB[0-9_]+]]
151 ; OCTEON: bbit032 $4, 3, [[BB0:(\$|\.L)BB[0-9_]+]]
157 ; MIPS64: beqz $[[T2]], [[BB0:(\$|\.L)BB[0-9_]+]]
187 ; OCTEON: bbit0 $1, 1, [[BB0:(\$|\.L)BB[0-9_]+]]
208 ; OCTEON: bbit1 $1, 1, [[BB0:(\$|\.L)BB[0-9_]+]]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | CodeMoverUtils.cpp | 39 bool llvm::isControlFlowEquivalent(const BasicBlock &BB0, const BasicBlock &BB1, in isControlFlowEquivalent() argument
42 if (&BB0 == &BB1) in isControlFlowEquivalent()
45 return ((DT.dominates(&BB0, &BB1) && PDT.dominates(&BB1, &BB0)) || in isControlFlowEquivalent()
46 (PDT.dominates(&BB0, &BB1) && DT.dominates(&BB1, &BB0))); in isControlFlowEquivalent()
|