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Searched refs:BRW_OPCODE_AND (Results 1 – 22 of 22) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_fs_cmod_propagation.cpp183 scan_inst->opcode != BRW_OPCODE_AND) in cmod_propagate_not()
231 if ((inst->opcode != BRW_OPCODE_AND && in opt_cmod_propagation_local()
255 if (inst->opcode == BRW_OPCODE_AND && in opt_cmod_propagation_local()
320 if (inst->opcode == BRW_OPCODE_AND) in opt_cmod_propagation_local()
Dbrw_vec4_cmod_propagation.cpp58 if ((inst->opcode != BRW_OPCODE_AND && in opt_cmod_propagation_local()
74 if (inst->opcode == BRW_OPCODE_AND && in opt_cmod_propagation_local()
265 if (inst->opcode == BRW_OPCODE_AND) in opt_cmod_propagation_local()
Dbrw_eu.cpp603 { BRW_OPCODE_AND, 5, "and", 2, 1, GEN_LT(GEN12) },
604 { BRW_OPCODE_AND, 101, "and", 2, 1, GEN_GE(GEN12) },
Dbrw_shader.cpp850 case BRW_OPCODE_AND: in is_commutative()
1003 case BRW_OPCODE_AND: in can_do_cmod()
Dbrw_vec4_cse.cpp55 case BRW_OPCODE_AND: in is_expression()
Dbrw_fs_copy_propagation.cpp363 return (opcode == BRW_OPCODE_AND || in is_logic_op()
772 case BRW_OPCODE_AND: in try_constant_propagate()
Dbrw_fs_cse.cpp54 case BRW_OPCODE_AND: in is_expression()
Dbrw_vec4_copy_propagation.cpp210 case BRW_OPCODE_AND: in try_constant_propagate()
Dtest_vec4_cmod_propagation.cpp248 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
586 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
Dbrw_eu_defines.h207 BRW_OPCODE_AND, enumerator
Dtest_fs_cmod_propagation.cpp645 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
955 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
2034 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 0)->opcode); in TEST_F()
Dbrw_vec4_generator.cpp1383 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_pull_constant_load_gen7()
1572 case BRW_OPCODE_AND: in generate_code()
Dbrw_fs_generator.cpp1650 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_uniform_pull_constant_load_gen7()
2065 case BRW_OPCODE_AND: in generate_code()
Dbrw_ir_performance.cpp298 case BRW_OPCODE_AND: in instruction_desc()
Dbrw_disasm.c77 return opcode == BRW_OPCODE_AND || in is_logic_instruction()
Dbrw_fs_nir.cpp3943 case nir_op_iand: return BRW_OPCODE_AND; in brw_op_for_nir_reduction_op()
Dbrw_fs.cpp6516 case BRW_OPCODE_AND: in get_lowered_simd_width()
/external/igt-gpu-tools/assembler/
Dlex.l124 "and" { yylval.integer = BRW_OPCODE_AND; return AND; }
Dbrw_defines.h640 BRW_OPCODE_AND = 5, enumerator
Dbrw_disasm.c61 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
/external/mesa3d/src/intel/tools/
Di965_lex.l54 and { yylval.integer = BRW_OPCODE_AND; return AND; }
Di965_gram.y216 case BRW_OPCODE_AND: in i965_asm_binary_instruction()