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Searched refs:BRW_OPCODE_SEND (Results 1 – 18 of 18) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_eu_emit.c113 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_dest()
221 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0()
235 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0()
355 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src1()
459 assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_desc_ex()
2003 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); in gen4_math()
2148 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_write_scratch()
2262 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_read_scratch()
2291 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); in gen7_block_read_scratch()
2365 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_read()
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Dtest_eu_compact.cpp70 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits()
133 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit()
Dbrw_vec4_generator.cpp773 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_tcs_urb_write()
960 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_vec4_urb_read()
997 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_tcs_release_input()
1174 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_scratch_read()
1250 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_scratch_write()
1313 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_pull_constant_load()
1364 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND); in generate_pull_constant_load_gen7()
1885 brw_memory_fence(p, dst, src[0], BRW_OPCODE_SEND, in generate_code()
Dbrw_eu_defines.h249 BRW_OPCODE_SEND, enumerator
1181 (opcode == BRW_OPCODE_SEND || in tgl_swsb_decode()
Dbrw_eu.cpp661 { BRW_OPCODE_SEND, 49, "send", 1, 1, GEN_LT(GEN12) },
663 { BRW_OPCODE_SEND, 49, "send", 2, 1, GEN_GE(GEN12) },
Dbrw_fs_generator.cpp819 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_urb_read()
840 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND); in generate_urb_write()
870 insn = brw_next_insn(p, BRW_OPCODE_SEND); in generate_cs_terminate()
1627 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_uniform_pull_constant_load_gen7()
1713 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_varying_pull_constant_load_gen4()
2392 BRW_OPCODE_SENDC : BRW_OPCODE_SEND; in generate_code()
Dbrw_eu_validate.c96 case BRW_OPCODE_SEND: in inst_is_send()
227 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND) { in num_sources_from_inst()
Dbrw_disasm.c86 return opcode == BRW_OPCODE_SEND || in is_send()
1751 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6) in brw_disassemble_inst()
Dbrw_eu_compact.c1299 brw_inst_opcode(devinfo, src) == BRW_OPCODE_SEND) && in has_unmapped_bits()
/external/mesa3d/src/intel/common/
Dgen_disasm.c34 return (opcode == BRW_OPCODE_SEND || in is_send()
/external/igt-gpu-tools/assembler/
Dbrw_eu_emit.c258 if (intel->gen >= 6 && (insn->header.opcode == BRW_OPCODE_SEND || in brw_set_src0()
1813 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); in brw_math()
1939 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_write_scratch()
2046 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_read_scratch()
2104 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); in brw_oword_block_read()
2155 insn = next_insn(p, BRW_OPCODE_SEND); in brw_fb_WRITE()
2284 insn = next_insn(p, BRW_OPCODE_SEND); in brw_SAMPLE()
2350 insn = next_insn(p, BRW_OPCODE_SEND); in brw_urb_WRITE()
2523 insn = next_insn(p, BRW_OPCODE_SEND); in brw_ff_sync()
2561 insn = next_insn(p, BRW_OPCODE_SEND); in brw_svb_write()
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Dbrw_disasm.c70 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
1071 } else if (inst->header.opcode != BRW_OPCODE_SEND && in brw_disasm()
1096 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6) in brw_disasm()
1143 if (inst->header.opcode == BRW_OPCODE_SEND || in brw_disasm()
1337 if (inst->header.opcode == BRW_OPCODE_SEND || in brw_disasm()
Dgen8_disasm.c863 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) { in gen8_disassemble()
921 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { in gen8_disassemble()
979 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) in gen8_disassemble()
Dlex.l134 "send" { yylval.integer = BRW_OPCODE_SEND; return SEND; }
Dbrw_eu_compact.c717 if ((src->header.opcode == BRW_OPCODE_SEND || in brw_compact_instructions()
Dbrw_defines.h675 BRW_OPCODE_SEND = 49, enumerator
Dgram.y3044 (instr->header.opcode == BRW_OPCODE_SEND)) { in reset_instruction_src_region()
/external/mesa3d/src/intel/tools/
Di965_lex.l121 send { yylval.integer = BRW_OPCODE_SEND; return SEND; }