Searched refs:BaseOps2 (Results 1 – 7 of 7) sorted by relevance
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 145 ArrayRef<const MachineOperand *> BaseOps2,
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| D | AArch64InstrInfo.cpp | 2629 ArrayRef<const MachineOperand *> BaseOps2, unsigned NumLoads, in shouldClusterMemOps() argument
2631 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2633 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 528 ArrayRef<const MachineOperand *> BaseOps2,
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| D | PPCInstrInfo.cpp | 2346 ArrayRef<const MachineOperand *> BaseOps2, unsigned NumLoads, in shouldClusterMemOps() argument
2349 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2351 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 444 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
448 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
473 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
478 assert(!BaseOps1.empty() && !BaseOps2.empty()); in shouldClusterMemOps()
480 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
481 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
2891 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBaseOperands() argument
2892 if (BaseOps1.size() != BaseOps2.size()) in memOpsHaveSameBaseOperands()
2895 if (!BaseOps1[I]->isIdenticalTo(*BaseOps2[I])) in memOpsHaveSameBaseOperands()
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| D | SIInstrInfo.h | 195 ArrayRef<const MachineOperand *> BaseOps2,
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1330 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
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