Searched refs:BaseRegNum (Results 1 – 10 of 10) sorted by relevance
847 unsigned BaseRegNum; member1109 if(Memory.BaseRegNum != ARM::PC) return false; in isThumbMemPC()1359 if (Memory.BaseRegNum && in isMVEMem()1360 !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) && in isMVEMem()1361 !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum)) in isMVEMem()1372 if (Memory.BaseRegNum && in isGPRMem()1373 !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum)) in isGPRMem()1460 Memory.BaseRegNum)) in isMemNoOffsetT2()1472 Memory.BaseRegNum)) in isMemNoOffsetT2NoSp()1484 Memory.BaseRegNum)) in isMemNoOffsetT()[all …]
781 unsigned BaseRegNum; member1043 if(Memory.BaseRegNum != ARM::PC) return false; in isThumbMemPC()1293 if (Memory.BaseRegNum && in isMVEMem()1294 !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) && in isMVEMem()1295 !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum)) in isMVEMem()1306 if (Memory.BaseRegNum && in isGPRMem()1307 !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum)) in isGPRMem()1394 Memory.BaseRegNum)) in isMemNoOffsetT2()1406 Memory.BaseRegNum)) in isMemNoOffsetT2NoSp()1418 Memory.BaseRegNum)) in isMemNoOffsetT()[all …]
510 unsigned BaseRegNum; member741 if(Memory.BaseRegNum != ARM::PC) return false; in isThumbMemPC()1101 if (Memory.BaseRegNum != ARM::PC) in isMemPCRelImm12()1266 Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC) in isT2MemRegOffset()1281 return isARMLowRegister(Memory.BaseRegNum) && in isMemThumbRR()1286 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs4()1295 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs2()1304 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs1()1313 Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0) in isMemThumbSPI()1346 if (Memory.BaseRegNum == ARM::PC) return false; in isMemImm8Offset()[all …]
349 unsigned BaseRegNum = MemoryOperand + CurOp + X86::AddrBaseReg; in isRIPRelative() local350 unsigned BaseReg = MI.getOperand(BaseRegNum).getReg(); in isRIPRelative()425 unsigned BaseRegNum = MemoryOperand + X86::AddrBaseReg; in determinePaddingPrefix() local426 unsigned BaseReg = Inst.getOperand(BaseRegNum).getReg(); in determinePaddingPrefix()
314 unsigned BaseRegNum = MemoryOperand + CurOp + X86::AddrBaseReg; in isRIPRelative() local315 unsigned BaseReg = MI.getOperand(BaseRegNum).getReg(); in isRIPRelative()
357 void setBaseRegNum(RegNumT RegNum) { BaseRegNum = RegNum; } in setBaseRegNum()358 RegNumT getBaseRegNum() const override { return BaseRegNum; } in getBaseRegNum()364 RegNumT BaseRegNum; variable
965 auto BaseRegNum = Var->getBaseRegNum();966 if (BaseRegNum.hasNoValue())967 BaseRegNum = getFrameOrStackReg();976 Str << "(%" << getRegName(BaseRegNum, FrameSPTy) << ")";990 auto BaseRegNum = Var->getBaseRegNum();997 BaseRegNum = getFrameReg();999 BaseRegNum = getFrameOrStackReg();1002 return X86Address(Traits::getEncodedGPR(BaseRegNum), Offset,
2836 const auto BaseRegNum = Traits::getBaseReg(RegNum); in emitIAS() local2837 (void)BaseRegNum; in emitIAS()2839 Traits::getEncodedGPR(BaseRegNum)); in emitIAS()
1236 auto BaseRegNum = Var->getBaseRegNum(); in emitVariable() local1237 if (BaseRegNum.hasNoValue()) { in emitVariable()1238 BaseRegNum = getFrameOrStackReg(); in emitVariable()1241 Str << "[" << getRegName(BaseRegNum, VarTy); in emitVariable()
491 const auto BaseRegNum = in encodeAddress() local493 Value = encodeImmRegOffset(ImmEncoding, BaseRegNum, Offset, in encodeAddress()