| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 961 __ Bic(r3, r0, r1); in TEST() local
962 __ Bic(r4, r0, Operand(r1, LSL, 4)); in TEST() local
963 __ Bic(r5, r0, Operand(r1, LSR, 1)); in TEST() local
964 __ Bic(r6, r0, Operand(r1, ASR, 20)); in TEST() local
965 __ Bic(r7, r0, Operand(r1, ROR, 28)); in TEST() local
966 __ Bic(r8, r0, 0x1f); in TEST() local
970 __ Bic(r9, r1, Operand(r1, RRX)); in TEST() local
974 __ Bic(r10, r1, Operand(r1, RRX)); in TEST() local
3267 __ Bic(r0, r0, 0); in TEST() local
3311 __ Bic(r2, r0, 0xffffffff); in TEST() local
|
| D | test-disasm-a32.cc | 1491 COMPARE_BOTH(Bic(r0, r1, 0xffffffff), "mov r0, #0\n"); in TEST()
1492 COMPARE_BOTH(Bic(r0, r0, 0), ""); in TEST()
3282 COMPARE_T32(Bic(eq, r7, r7, r6), in TEST()
3286 COMPARE_T32(Bic(eq, r8, r8, r6), in TEST()
4037 CHECK_T32_16(Bic(DontCare, r7, r7, r6), "bics r7, r6\n"); in TEST()
4039 CHECK_T32_16_IT_BLOCK(Bic(DontCare, eq, r7, r7, r6), in TEST()
|
| D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-const-a32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-const-t32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 122 M(Bic) \
|
| D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 122 M(Bic) \
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 2814 COMPARE_MACRO(Bic(w6, w7, 0), "mov w6, w7"); in TEST()
2815 COMPARE_MACRO(Bic(x6, x7, 0), "mov x6, x7"); in TEST()
2831 COMPARE_MACRO(Bic(w18, w19, 0xffffffff), "mov w18, #0x0"); in TEST()
2832 COMPARE_MACRO(Bic(x18, x19, 0xffffffff), "and x18, x19, #0xffffffff00000000"); in TEST()
2833 COMPARE_MACRO(Bic(x18, x19, 0xffffffffffffffff), "mov x18, #0x0"); in TEST()
2861 COMPARE_MACRO(Bic(x0, x0, 0x4242), in TEST()
|
| D | test-assembler-aarch64.cc | 757 __ Bic(x2, x0, Operand(x1)); in TEST() local
758 __ Bic(w3, w0, Operand(w1, LSL, 4)); in TEST() local
759 __ Bic(x4, x0, Operand(x1, LSL, 4)); in TEST() local
760 __ Bic(x5, x0, Operand(x1, LSR, 1)); in TEST() local
761 __ Bic(w6, w0, Operand(w1, ASR, 20)); in TEST() local
762 __ Bic(x7, x0, Operand(x1, ASR, 20)); in TEST() local
763 __ Bic(w8, w0, Operand(w1, ROR, 28)); in TEST() local
764 __ Bic(x9, x0, Operand(x1, ROR, 24)); in TEST() local
765 __ Bic(x10, x0, Operand(0x1f)); in TEST() local
766 __ Bic(x11, x0, Operand(0x100)); in TEST() local
[all …]
|
| D | test-assembler-neon-aarch64.cc | 5987 __ Bic(v16.V16B(), v0.V16B(), v0.V16B()); // self test in TEST() local
5988 __ Bic(v17.V16B(), v0.V16B(), v1.V16B()); // all combinations in TEST() local
5989 __ Bic(v24.V8B(), v0.V8B(), v0.V8B()); // self test in TEST() local
5990 __ Bic(v25.V8B(), v0.V8B(), v1.V8B()); // all combinations in TEST() local
7304 __ Bic(v16.V4H(), 0x00, 0); in TEST() local
7305 __ Bic(v17.V4H(), 0xff, 8); in TEST() local
7306 __ Bic(v18.V8H(), 0x00, 0); in TEST() local
7307 __ Bic(v19.V8H(), 0xff, 8); in TEST() local
7309 __ Bic(v20.V2S(), 0x00, 0); in TEST() local
7310 __ Bic(v21.V2S(), 0xff, 8); in TEST() local
[all …]
|
| D | test-disasm-neon-aarch64.cc | 1752 COMPARE_MACRO(Bic(v6.V8B(), v7.V8B(), v8.V8B()), "bic v6.8b, v7.8b, v8.8b"); in TEST()
1753 COMPARE_MACRO(Bic(v6.V16B(), v7.V16B(), v8.V16B()), in TEST()
3063 COMPARE_MACRO(Bic(v4.V4H(), 0xaa, 0), "bic v4.4h, #0xaa, lsl #0"); in TEST()
3064 COMPARE_MACRO(Bic(v1.V8H(), 0xcc, 8), "bic v1.8h, #0xcc, lsl #8"); in TEST()
3065 COMPARE_MACRO(Bic(v4.V2S(), 0xaa, 0), "bic v4.2s, #0xaa, lsl #0"); in TEST()
3066 COMPARE_MACRO(Bic(v1.V2S(), 0xcc, 8), "bic v1.2s, #0xcc, lsl #8"); in TEST()
3067 COMPARE_MACRO(Bic(v4.V4S(), 0xaa, 16), "bic v4.4s, #0xaa, lsl #16"); in TEST()
3068 COMPARE_MACRO(Bic(v1.V4S(), 0xcc, 24), "bic v1.4s, #0xcc, lsl #24"); in TEST()
|
| D | test-disasm-sve-aarch64.cc | 2311 COMPARE_MACRO(Bic(z17.VnB(), p7.Merging(), z17.VnB(), z10.VnB()), in TEST()
2313 COMPARE_MACRO(Bic(z17.VnS(), p7.Merging(), z10.VnS(), z17.VnS()), in TEST()
2315 COMPARE_MACRO(Bic(z17.VnD(), p7.Merging(), z7.VnD(), z27.VnD()), in TEST()
6198 COMPARE_MACRO(Bic(z11, z2, z16), "bic z11.d, z2.d, z16.d"); in TEST()
6203 COMPARE_MACRO(Bic(z11.VnS(), z2.VnS(), z16.VnS()), "bic z11.d, z2.d, z16.d"); in TEST()
|
| D | test-assembler-sve-aarch64.cc | 557 __ Bic(z2.VnD(), z8.VnD(), z15.VnD()); in TEST_SVE() local
4986 fn = &MacroAssembler::Bic; in TEST_SVE()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 385 Bic, enumerator
1007 using InstARM32Bic = InstARM32ThreeAddrGPR<InstARM32::Bic>;
|
| D | IceInstARM32.cpp | 3490 template class InstARM32ThreeAddrGPR<InstARM32::Bic>;
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 727 void Bic(const Register& rd, const Register& rn, const Operand& operand);
2693 V(bic, Bic) \
3054 V(bic, Bic) \
3087 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) {
3564 void Bic(const PRegisterWithLaneSize& pd, in Bic() function
3572 void Bic(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Bic() function
3578 void Bic(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in Bic() function
|
| D | macro-assembler-aarch64.cc | 770 void MacroAssembler::Bic(const Register& rd, in Bic() function in vixl::aarch64::MacroAssembler
2638 Bic(sp, StackPointer(), 0xf); in PrintfNoPreserve()
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 1350 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { in Bic() function
1374 void Bic(Register rd, Register rn, const Operand& operand) { in Bic() function
1375 Bic(al, rd, rn, operand); in Bic()
1377 void Bic(FlagsUpdate flags, in Bic() function
1384 Bic(cond, rd, rn, operand); in Bic()
1396 Bic(cond, rd, rn, operand); in Bic()
1401 void Bic(FlagsUpdate flags, in Bic() function
1405 Bic(flags, al, rd, rn, operand); in Bic()
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 44 # Vector And, Orr, Eor, Orn, Bic
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 44 # Vector And, Orr, Eor, Orn, Bic
|
| /external/libwebsockets/minimal-examples/api-tests/api-test-fts/ |
| D | les-mis-utf8.txt | 4048 une grande chaîne fut ferrée à Bicêtre. Jean Valjean fit partie de cette
|