Searched refs:C1Val (Results 1 – 11 of 11) sorted by relevance
/external/llvm/lib/IR/ |
D | ConstantFold.cpp | 1314 int64_t C1Val = cast<ConstantInt>(C1)->getSExtValue(); in IdxCompare() local 1317 if (C1Val == C2Val) return 0; // They are equal in IdxCompare() 1326 if (C1Val < C2Val) in IdxCompare()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | ConstantFold.cpp | 1442 int64_t C1Val = cast<ConstantInt>(C1)->getSExtValue(); in IdxCompare() local 1445 if (C1Val == C2Val) return 0; // They are equal in IdxCompare() 1454 if (C1Val < C2Val) in IdxCompare()
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/external/llvm-project/llvm/lib/IR/ |
D | ConstantFold.cpp | 1563 int64_t C1Val = cast<ConstantInt>(C1)->getSExtValue(); in IdxCompare() local 1566 if (C1Val == C2Val) return 0; // They are equal in IdxCompare() 1575 if (C1Val < C2Val) in IdxCompare()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPULegalizerInfo.cpp | 1365 APFloat C1Val(APFloat::IEEEdouble(), "0x1.0p+52"); in legalizeFrint() local 1368 auto C1 = B.buildFConstant(Ty, C1Val); in legalizeFrint()
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D | AMDGPUISelLowering.cpp | 2134 APFloat C1Val(APFloat::IEEEdouble(), "0x1.0p+52"); in LowerFRINT() local 2135 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64); in LowerFRINT()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | CombinerHelper.cpp | 1657 const uint64_t C1Val = MaybeImmVal->Value; in matchShiftOfShiftedLogic() local 1691 MatchInfo.ValSum = C0Val + C1Val; in matchShiftOfShiftedLogic()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 4633 const APInt &C1Val = C1->getAPIntValue(); in foldLogicOfSetCCs() local 4634 if ((C0Val - C1Val).isPowerOf2()) { in foldLogicOfSetCCs() 4637 SDValue OffsetC = DAG.getConstant(-C1Val, DL, OpVT); in foldLogicOfSetCCs() 4639 SDValue MaskC = DAG.getConstant(~(C0Val - C1Val), DL, OpVT); in foldLogicOfSetCCs() 7243 const APInt &C1Val = C1Node->getAPIntValue(); in combineShiftOfShiftedLogic() local 7259 if (ShiftAmtVal->getBitWidth() != C1Val.getBitWidth()) in combineShiftOfShiftedLogic() 7263 if ((*ShiftAmtVal + C1Val).uge(V.getScalarValueSizeInBits())) in combineShiftOfShiftedLogic() 7283 SDValue ShiftSumC = DAG.getConstant(*C0Val + C1Val, DL, ShiftAmtVT); in combineShiftOfShiftedLogic() 8449 const APInt &C1Val = C1->getAPIntValue(); in foldSelectOfConstants() local 8451 if (C1Val - 1 == C2Val) { in foldSelectOfConstants() [all …]
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 4906 const APInt &C1Val = C1->getAPIntValue(); in foldLogicOfSetCCs() local 4907 if ((C0Val - C1Val).isPowerOf2()) { in foldLogicOfSetCCs() 4910 SDValue OffsetC = DAG.getConstant(-C1Val, DL, OpVT); in foldLogicOfSetCCs() 4912 SDValue MaskC = DAG.getConstant(~(C0Val - C1Val), DL, OpVT); in foldLogicOfSetCCs() 7801 const APInt &C1Val = C1Node->getAPIntValue(); in combineShiftOfShiftedLogic() local 7817 if (ShiftAmtVal->getBitWidth() != C1Val.getBitWidth()) in combineShiftOfShiftedLogic() 7821 if ((*ShiftAmtVal + C1Val).uge(V.getScalarValueSizeInBits())) in combineShiftOfShiftedLogic() 7841 SDValue ShiftSumC = DAG.getConstant(*C0Val + C1Val, DL, ShiftAmtVT); in combineShiftOfShiftedLogic() 9139 const APInt &C1Val = C1->getAPIntValue(); in foldSelectOfConstants() local 9141 if (C1Val - 1 == C2Val) { in foldSelectOfConstants() [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 1698 APFloat C1Val(APFloat::IEEEdouble, "0x1.0p+52"); in LowerFRINT() local 1699 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64); in LowerFRINT()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPULegalizerInfo.cpp | 1869 APFloat C1Val(APFloat::IEEEdouble(), "0x1.0p+52"); in legalizeFrint() local 1872 auto C1 = B.buildFConstant(Ty, C1Val); in legalizeFrint()
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D | AMDGPUISelLowering.cpp | 2202 APFloat C1Val(APFloat::IEEEdouble(), "0x1.0p+52"); in LowerFRINT() local 2203 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64); in LowerFRINT()
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