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Searched refs:C20 (Results 1 – 25 of 68) sorted by relevance

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/external/llvm-project/clang/test/Coverage/
Dast-print-temp-class.cpp35 template<typename T, typename U> struct C20 { struct
39 template<typename T> struct C20<T, int> { argument
/external/llvm-project/clang/test/Parser/
Dcxx2a-concept-declaration.cpp88 template<typename T> concept C20 = (const bool)true;
89 static_assert(C20<int>);
/external/llvm-project/clang/test/SemaCXX/
Dfriend2.cpp106 template<typename T> struct C20 { struct
109 C20<int> c20i;
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dlegalize-fptrunc.mir151 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 32768
152 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR4]], [[C20]]
231 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 32768
232 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR4]], [[C20]]
274 ; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[LSHR9]], [[C20]]
358 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 32768
359 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR4]], [[C20]]
438 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 32768
439 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR4]], [[C20]]
481 ; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[LSHR9]], [[C20]]
Dlegalize-implicit-def-s1025.mir234 ; TAHITI: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
235 ; TAHITI: [[SHL19:%[0-9]+]]:_(s32) = G_SHL [[AND50]], [[C20]](s32)
370 ; FIJI: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
371 ; FIJI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C20]](s32)
Dlegalize-unmerge-values.mir763 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
764 ; CHECK: [[LSHR20:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C20]](s32)
849 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
850 ; CHECK: [[LSHR20:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C20]](s32)
Dlegalize-extract-vector-elt.mir1550 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 72
1551 ; CHECK: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)
1775 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 72
1776 ; CHECK: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)
1976 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
1977 ; CHECK: [[LSHR20:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C20]](s32)
2082 ; CHECK: [[SHL20:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C20]](s32)
Dlegalize-merge-values.mir815 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
816 ; CHECK: [[SHL19:%[0-9]+]]:_(s32) = G_SHL [[AND20]], [[C20]](s32)
953 ; CHECK: [[SHL50:%[0-9]+]]:_(s32) = G_SHL [[AND52]], [[C20]](s32)
1062 ; CHECK: [[SHL81:%[0-9]+]]:_(s32) = G_SHL [[COPY84]], [[C20]](s32)
Dlegalize-insert-vector-elt.mir463 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 68
464 ; CHECK: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)
/external/llvm-project/mlir/test/Dialect/SCF/
Dloop-unroll.mlir171 // UNROLL-BY-2-DAG: %[[C20:.*]] = constant 20 : index
173 // UNROLL-BY-2: scf.for %[[IV:.*]] = %[[C0]] to %[[C20]] step %[[C2]] {
200 // UNROLL-BY-3-DAG: %[[C20:.*]] = constant 20 : index
214 // UNROLL-BY-3-NEXT: scf.for %[[IV:.*]] = %[[C18]] to %[[C20]] step %[[C1]] {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td233 def C20 : Ri< 20, "C20">;
312 def C20_C21 : Rdi<20, "C20", [C20, C21]>;
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td233 def C20 : Ri< 20, "C20">;
312 def C20_C21 : Rdi<20, "C20", [C20, C21]>;
/external/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td234 def C20 : Ri< 20, "C20">;
313 def C20_C21 : Rdi<20, "C20", [C20, C21]>;
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Darm64-irtranslator-switch.ll252 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
445 ; CHECK: [[ICMP20:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C20]]
1107 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
1210 …32), %bb.11, [[C17]](s32), %bb.12, [[C18]](s32), %bb.13, [[C19]](s32), %bb.14, [[C20]](s32), %bb.15
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp132 SP::C20, SP::C21, SP::C22, SP::C23,
/external/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp139 SP::C20, SP::C21, SP::C22, SP::C23,
/external/llvm-project/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp132 SP::C20, SP::C21, SP::C22, SP::C23,
/external/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp159 Sparc::C20, Sparc::C21, Sparc::C22, Sparc::C23,
/external/autotest/client/site_tests/platform_PrinterPpds/digests/
Ddenylist.txt713 sharp-20191219-Sharp-BP-10C20-ps.ppd.gz
715 sharp-20191219-Sharp-DX-20C20-ps-jp.ppd.gz
/external/llvm-project/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp188 Sparc::C20, Sparc::C21, Sparc::C22, Sparc::C23,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp186 Sparc::C20, Sparc::C21, Sparc::C22, Sparc::C23,
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Darith-sub-usubo.ll368 ; CHECK-NEXT: [[C20:%.*]] = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 [[A20]], i16 [[B20…
400 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i16, i1 } [[C20]], 0
759 ; CHECK-NEXT: [[C20:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[A20]], i8 [[B20]])
823 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i8, i1 } [[C20]], 0
Darith-add-uaddo.ll368 ; CHECK-NEXT: [[C20:%.*]] = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 [[A20]], i16 [[B20…
400 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i16, i1 } [[C20]], 0
759 ; CHECK-NEXT: [[C20:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[A20]], i8 [[B20]])
823 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i8, i1 } [[C20]], 0
Darith-sub-ssubo.ll368 ; CHECK-NEXT: [[C20:%.*]] = call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 [[A20]], i16 [[B20…
400 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i16, i1 } [[C20]], 0
759 ; CHECK-NEXT: [[C20:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[A20]], i8 [[B20]])
823 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i8, i1 } [[C20]], 0
Darith-add-saddo.ll368 ; CHECK-NEXT: [[C20:%.*]] = call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 [[A20]], i16 [[B20…
400 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i16, i1 } [[C20]], 0
759 ; CHECK-NEXT: [[C20:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[A20]], i8 [[B20]])
823 ; CHECK-NEXT: [[R20:%.*]] = extractvalue { i8, i1 } [[C20]], 0

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