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Searched refs:CCSIDR (Results 1 – 9 of 9) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/
Dcore_cm7.h524 __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ member
2133 ccsidr = SCB->CCSIDR; in SCB_EnableDCache()
2171 ccsidr = SCB->CCSIDR; in SCB_DisableDCache()
2208 ccsidr = SCB->CCSIDR; in SCB_InvalidateDCache()
2243 ccsidr = SCB->CCSIDR; in SCB_CleanDCache()
2278 ccsidr = SCB->CCSIDR; in SCB_CleanInvalidateDCache()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/
Dcore_cm7.h524 __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ member
2133 ccsidr = SCB->CCSIDR; in SCB_EnableDCache()
2171 ccsidr = SCB->CCSIDR; in SCB_DisableDCache()
2208 ccsidr = SCB->CCSIDR; in SCB_InvalidateDCache()
2243 ccsidr = SCB->CCSIDR; in SCB_CleanDCache()
2278 ccsidr = SCB->CCSIDR; in SCB_CleanInvalidateDCache()
/external/arm-trusted-firmware/lib/aarch32/
Dcache_helpers.S105 ldcopr r12, CCSIDR // read the new ccsidr
/external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/
Ddevice1.ini50 CCSIDR=0x707FE07A key
/external/OpenCSD/decoder/tests/snapshots/trace_cov_a15/
Ddevice1.ini50 CCSIDR=0x707FE07A key
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h545 #define CCSIDR p15, 1, c0, c0, 0 macro
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64.td252 "Enable v8.3-A Extend of the CCSIDR number of sets">;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64.td275 "Enable v8.3-A Extend of the CCSIDR number of sets">;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSubtargetInfo.inc219 …{ "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", AArch64::FeatureCCIDX, { { { 0x0UL…