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Searched refs:CMD_CASUAL (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/intel/soc/common/soc/
Dsocfpga_mailbox.c369 CMD_CASUAL, NULL, 0U); in mailbox_set_qspi_open()
375 CMD_CASUAL, NULL, 0U); in mailbox_set_qspi_direct()
382 CMD_CASUAL, NULL, 0U); in mailbox_set_qspi_close()
393 1U, CMD_CASUAL, NULL, 0U); in mailbox_qspi_set_cs()
400 CMD_CASUAL, NULL, 0U); in mailbox_reset_cold()
406 NULL, 0U, CMD_CASUAL, resp_buf, in mailbox_rsu_get_spt_offset()
428 CMD_CASUAL, resp_buf, in mailbox_rsu_status()
448 CMD_CASUAL, NULL, 0U); in mailbox_rsu_update()
454 &execution_stage, 1U, CMD_CASUAL, in mailbox_hps_stage_notify()
485 status = mailbox_send_cmd(MBOX_JOB_ID, cmd, NULL, 0U, CMD_CASUAL, in intel_mailbox_get_config_status()
/external/arm-trusted-firmware/plat/intel/soc/common/include/
Dsocfpga_mailbox.h69 #define CMD_CASUAL 0 macro
/external/arm-trusted-firmware/plat/intel/soc/common/
Dsocfpga_sip_svc.c193 mailbox_send_cmd(1U, MBOX_CMD_CANCEL, NULL, 0U, CMD_CASUAL, NULL, 0U); in intel_fpga_config_start()
195 status = mailbox_send_cmd(1U, MBOX_RECONFIG, NULL, 0U, CMD_CASUAL, in intel_fpga_config_start()