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Searched refs:COMMON_PHY_CFG1_CORE_RSTN_OFFSET (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/drivers/marvell/
Dcomphy.h24 #define COMMON_PHY_CFG1_CORE_RSTN_OFFSET 14 macro
26 (0x1 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET)
/external/arm-trusted-firmware/drivers/marvell/comphy/
Dcomphy-cp110.h28 #define COMMON_PHY_CFG1_CORE_RSTN_OFFSET 13 macro
30 (0x1 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET)
Dphy-comphy-cp110.c385 data |= 0x0 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_sata_power_on()
1353 data |= 0x0 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_pcie_power_on()
1362 data |= 0x1 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_pcie_power_on()
1954 data |= 0x0 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_usb3_power_on()
1963 data |= 0x1 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_usb3_power_on()
2493 data |= 0x0 << COMMON_PHY_CFG1_CORE_RSTN_OFFSET; in mvebu_cp110_comphy_power_off()