Searched refs:CRG_CLKDIV18_REG (Results 1 – 2 of 2) sorted by relevance
81 mmio_write_32(CRG_CLKDIV18_REG, 0x01400140); in set_dss_power_up()88 mmio_write_32(CRG_CLKDIV18_REG, 0x01400000); in set_dss_power_up()96 mmio_write_32(CRG_CLKDIV18_REG, 0x01400140); in set_dss_power_up()125 mmio_write_32(CRG_CLKDIV18_REG, 0x80008000); in set_vdec_power_up()132 mmio_write_32(CRG_CLKDIV18_REG, 0x80000000); in set_vdec_power_up()139 mmio_write_32(CRG_CLKDIV18_REG, 0x80008000); in set_vdec_power_up()185 mmio_write_32(CRG_CLKDIV18_REG, 0x70007000); in set_isp_power_up()193 mmio_write_32(CRG_CLKDIV18_REG, 0x70000000); in set_isp_power_up()201 mmio_write_32(CRG_CLKDIV18_REG, 0x70007000); in set_isp_power_up()
112 #define CRG_CLKDIV18_REG (CRG_REG_BASE + 0x0F0) macro