| /external/clang/test/SemaCXX/ |
| D | cxx1y-deduced-return-type.cpp | 13 struct Conv1 { struct
18 Conv1::operator auto() { return 123; } in operator auto()
|
| /external/llvm-project/clang/test/SemaCXX/ |
| D | cxx1y-deduced-return-type.cpp | 13 struct Conv1 { struct
18 Conv1::operator auto() { return 123; } in operator auto()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9180 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); in lowerToVINSERTH() local
9186 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
9191 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
9255 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
9260 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Shl, in LowerVECTOR_SHUFFLE()
9264 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
9282 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
9286 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
9295 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1); in LowerVECTOR_SHUFFLE() local
9299 SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9838 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); in lowerToVINSERTH() local
9844 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
9849 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
10039 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
10044 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Shl, in LowerVECTOR_SHUFFLE()
10048 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
10072 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
10076 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
10085 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1); in LowerVECTOR_SHUFFLE() local
10089 SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
|
| /external/llvm-project/clang/lib/Sema/ |
| D | SemaOverload.cpp | 3669 CXXConversionDecl *Conv1 = dyn_cast_or_null<CXXConversionDecl>(Function1); in compareConversionFunctions() local
3671 if (!Conv1 || !Conv2) in compareConversionFunctions()
3674 if (!Conv1->getParent()->isLambda() || !Conv2->getParent()->isLambda()) in compareConversionFunctions()
3684 bool Block1 = Conv1->getConversionType()->isBlockPointerType(); in compareConversionFunctions()
3696 const FunctionType *Conv1FuncRet = getConversionOpReturnTyAsFunction(Conv1); in compareConversionFunctions()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7450 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
7455 SDValue Ins = DAG.getNode(PPCISD::XXINSERT, dl, MVT::v4i32, Conv1, Shl, in LowerVECTOR_SHUFFLE()
7459 SDValue Ins = DAG.getNode(PPCISD::XXINSERT, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
|