Searched refs:CvtLo (Results 1 – 5 of 5) sorted by relevance
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 2013 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP() local
2021 B.buildFAdd(Dst, LdExp, CvtLo); in legalizeITOFP()
2842 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64() local
2846 B.buildFConstant(S32, BitsToFloat(0x4f800000)), CvtLo); in emitReciprocalU64()
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| D | AMDGPUISelLowering.cpp | 2494 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64() local
2499 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo); in LowerINT_TO_FP64()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 1493 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP() local
1501 B.buildFAdd(Dst, LdExp, CvtLo); in legalizeITOFP()
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| D | AMDGPUISelLowering.cpp | 2496 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64() local
2501 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo); in LowerINT_TO_FP64()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2003 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64() local
2008 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo); in LowerINT_TO_FP64()
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