Searched refs:DIVUW (Results 1 – 7 of 7) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoM.td | 19 def riscv_divuw : SDNode<"RISCVISD::DIVUW", SDTIntBinOp>;
50 def DIVUW : ALUW_rr<0b0000001, 0b101, "divuw">,
78 def : PatGprGpr<riscv_divuw, DIVUW>;
82 // in fewer instructions than emitting DIVUW/REMUW then zero-extending the
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| D | RISCVISelLowering.h | 43 DIVUW, enumerator
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| D | RISCVISelLowering.cpp | 839 return RISCVISD::DIVUW; in getRISCVWOpcode()
1090 case RISCVISD::DIVUW: in ComputeNumSignBitsForTargetNode()
2527 case RISCVISD::DIVUW: in getTargetNodeName()
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoM.td | 19 def riscv_divuw : SDNode<"RISCVISD::DIVUW", SDTIntBinOp>;
50 def DIVUW : ALUW_rr<0b0000001, 0b101, "divuw">,
78 def : PatGprGpr<riscv_divuw, DIVUW>;
82 // in fewer instructions than emitting DIVUW/REMUW then zero-extending the
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| D | RISCVISelLowering.h | 43 DIVUW, enumerator
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| D | RISCVISelLowering.cpp | 1030 return RISCVISD::DIVUW; in getRISCVWOpcode()
1642 case RISCVISD::DIVUW: in ComputeNumSignBitsForTargetNode()
3225 NODE_NAME_CASE(DIVUW) in getTargetNodeName()
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| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEInstrInfo.td | 1188 let cx = 1 in defm DIVUW : RRNCm<"divu.w", 0x6F, I32, i32, udiv>;
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