| /external/llvm/include/llvm/CodeGen/ |
| D | RuntimeLibcalls.h | 101 DIV_F32, enumerator
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 62 { RTLIB::DIV_F32, "__mips16_divsf3" },
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 61 { RTLIB::DIV_F32, "__mips16_divsf3" },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 61 { RTLIB::DIV_F32, "__mips16_divsf3" },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 105 HANDLE_LIBCALL(DIV_F32, "__divsf3")
|
| /external/llvm-project/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 105 HANDLE_LIBCALL(DIV_F32, "__divsf3")
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 165 Table[RTLIB::DIV_F32] = f32_func_f32_f32; in RuntimeLibcallSignatureTable()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 166 Table[RTLIB::DIV_F32] = f32_func_f32_f32; in RuntimeLibcallSignatureTable()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 315 RTLIB::DIV_F32, in SoftenFloatRes_FDIV()
1149 RTLIB::DIV_F32, in ExpandFloatRes_FDIV()
|
| D | LegalizeDAG.cpp | 3901 Results.push_back(ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 349 RTLIB::DIV_F32, in SoftenFloatRes_FDIV()
1313 RTLIB::DIV_F32, in ExpandFloatRes_FDIV()
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| D | LegalizeDAG.cpp | 4102 ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 217 { RTLIB::DIV_F32, "__mspabi_divf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 216 { RTLIB::DIV_F32, "__mspabi_divf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 119 Names[RTLIB::DIV_F32] = "__divsf3"; in InitLibcallNames()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 368 RTLIB::DIV_F32, in SoftenFloatRes_FDIV()
1356 RTLIB::DIV_F32, in ExpandFloatRes_FDIV()
|
| D | LegalizeDAG.cpp | 4280 ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1814 setLibcallName(RTLIB::DIV_F32, "__hexagon_fast_divsf3"); in HexagonTargetLowering()
1820 setLibcallName(RTLIB::DIV_F32, "__hexagon_divsf3"); in HexagonTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1665 setLibcallName(RTLIB::DIV_F32, "__hexagon_fast_divsf3"); in HexagonTargetLowering()
1671 setLibcallName(RTLIB::DIV_F32, "__hexagon_divsf3"); in HexagonTargetLowering()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2137 setLibcallName(RTLIB::DIV_F32, "__hexagon_fast_divsf3"); in HexagonTargetLowering()
2143 setLibcallName(RTLIB::DIV_F32, "__hexagon_divsf3"); in HexagonTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 286 return Size == 64 ? RTLIB::DIV_F64 : RTLIB::DIV_F32; in getRTLibDesc()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 183 { RTLIB::DIV_F32, "__divsf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering()
285 { RTLIB::DIV_F32, "__aeabi_fdiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 453 { RTLIB::DIV_F32, "__divsf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering()
545 { RTLIB::DIV_F32, "__aeabi_fdiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 480 { RTLIB::DIV_F32, "__divsf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering()
572 { RTLIB::DIV_F32, "__aeabi_fdiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
|