/external/llvm/include/llvm/CodeGen/ |
D | RuntimeLibcalls.h | 102 DIV_F64, enumerator
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 61 { RTLIB::DIV_F64, "__mips16_divdf3" },
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/external/llvm-project/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 60 { RTLIB::DIV_F64, "__mips16_divdf3" },
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 60 { RTLIB::DIV_F64, "__mips16_divdf3" },
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | RuntimeLibcalls.def | 106 HANDLE_LIBCALL(DIV_F64, "__divdf3")
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/external/llvm-project/llvm/include/llvm/IR/ |
D | RuntimeLibcalls.def | 106 HANDLE_LIBCALL(DIV_F64, "__divdf3")
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 216 { RTLIB::DIV_F64, "__mspabi_divd", ISD::SETCC_INVALID }, in MSP430TargetLowering() 326 setLibcallCallingConv(RTLIB::DIV_F64, CallingConv::MSP430_BUILTIN); in MSP430TargetLowering()
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/external/llvm-project/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 215 { RTLIB::DIV_F64, "__mspabi_divd", ISD::SETCC_INVALID }, in MSP430TargetLowering() 325 setLibcallCallingConv(RTLIB::DIV_F64, CallingConv::MSP430_BUILTIN); in MSP430TargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRuntimeLibcallSignatures.cpp | 166 Table[RTLIB::DIV_F64] = f64_func_f64_f64; in RuntimeLibcallSignatureTable()
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/external/llvm-project/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRuntimeLibcallSignatures.cpp | 167 Table[RTLIB::DIV_F64] = f64_func_f64_f64; in RuntimeLibcallSignatureTable()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 316 RTLIB::DIV_F64, in SoftenFloatRes_FDIV() 1150 RTLIB::DIV_F64, in ExpandFloatRes_FDIV()
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D | LegalizeDAG.cpp | 3901 Results.push_back(ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 350 RTLIB::DIV_F64, in SoftenFloatRes_FDIV() 1314 RTLIB::DIV_F64, in ExpandFloatRes_FDIV()
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D | LegalizeDAG.cpp | 4102 ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 120 Names[RTLIB::DIV_F64] = "__divdf3"; in InitLibcallNames()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 369 RTLIB::DIV_F64, in SoftenFloatRes_FDIV() 1357 RTLIB::DIV_F64, in ExpandFloatRes_FDIV()
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D | LegalizeDAG.cpp | 4280 ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64, in ConvertNodeToLibcall()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1813 setLibcallName(RTLIB::DIV_F64, "__hexagon_fast_divdf3"); in HexagonTargetLowering() 1819 setLibcallName(RTLIB::DIV_F64, "__hexagon_divdf3"); in HexagonTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1664 setLibcallName(RTLIB::DIV_F64, "__hexagon_fast_divdf3"); in HexagonTargetLowering() 1670 setLibcallName(RTLIB::DIV_F64, "__hexagon_divdf3"); in HexagonTargetLowering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 2135 setLibcallName(RTLIB::DIV_F64, "__hexagon_fast_divdf3"); in HexagonTargetLowering() 2142 setLibcallName(RTLIB::DIV_F64, "__hexagon_divdf3"); in HexagonTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 286 return Size == 64 ? RTLIB::DIV_F64 : RTLIB::DIV_F32; in getRTLibDesc()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 189 { RTLIB::DIV_F64, "__divdf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering() 267 { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 459 { RTLIB::DIV_F64, "__divdf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering() 528 { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 486 { RTLIB::DIV_F64, "__divdf3vfp", ISD::SETCC_INVALID }, in ARMTargetLowering() 555 { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, in ARMTargetLowering()
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