| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 90 Register DestHi = TRI->getSubReg(DestReg, Hexagon::isub_hi); in runOnMachineFunction() local
97 BuildMI(B, MI, DL, TII->get(Hexagon::A2_tfrsi), DestHi) in runOnMachineFunction()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IcePhiLoweringImpl.h | 42 auto *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest)); in prelowerPhis32Bit() local
44 auto *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi); in prelowerPhis32Bit()
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| D | IceTargetLoweringARM32.cpp | 2590 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerInt64Arithmetic() local
2592 Variable *T_Hi = makeReg(DestHi->getType()); in lowerInt64Arithmetic()
2606 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2617 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2628 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2639 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2651 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2656 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2692 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2702 _mov(DestHi, SrcsHi.src0R(this)); in lowerInt64Arithmetic()
[all …]
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| D | IceTargetLoweringX86BaseImpl.h | 1767 Variable *DestHi) {
1788 _mov(DestHi, T_2);
1800 _mov(DestHi, Zero);
1815 _mov(DestHi, T_3);
1829 _mov(DestHi, T_2);
1839 _mov(DestHi, Zero);
1852 _mov(DestHi, T_3);
1891 _mov(DestHi, T_3);
1972 _mov(DestHi, T_3);
2024 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
[all …]
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| D | IceTargetLoweringMIPS32.cpp | 2040 Variable *DestHi = Target->makeReg( in legalizeMov() local
2053 Target->_mov(DestHi, Reg); in legalizeMov()
2455 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerInt64Arithmetic() local
2477 _mov(DestHi, T_Hi2); in lowerInt64Arithmetic()
2489 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2504 _mov(DestHi, T_Hi2); in lowerInt64Arithmetic()
2516 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2528 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
2550 _mov(DestHi, TM4); in lowerInt64Arithmetic()
2587 _mov(DestHi, T_Hi); in lowerInt64Arithmetic()
[all …]
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| D | IceInstARM32.cpp | 1517 InstARM32Umull::InstARM32Umull(Cfg *Func, Variable *DestLo, Variable *DestHi, in InstARM32Umull() argument
1522 DestHi(DestHi) { in InstARM32Umull()
1545 DestHi = Dest64->getHi(); in InstARM32Mov()
1905 Variable *DestHi = getDestHi(); in emitMultiDestSingleSource() local
1908 assert(DestHi->hasReg()); in emitMultiDestSingleSource()
1917 DestHi->emit(Func); in emitMultiDestSingleSource()
2152 Variable *DestHi = getDestHi(); in dump() local
2154 if (DestHi) { in dump()
2156 DestHi->dump(Func); in dump()
2977 DestHi->emit(Func); in emit()
[all …]
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| D | IceInstARM32.h | 1438 static InstARM32Umull *create(Cfg *Func, Variable *DestLo, Variable *DestHi, in create() argument
1442 InstARM32Umull(Func, DestLo, DestHi, Src0, Src1, Predicate); in create()
1450 InstARM32Umull(Cfg *Func, Variable *DestLo, Variable *DestHi, Variable *Src0,
1453 Variable *DestHi; variable
1519 bool isMultiDest() const { return DestHi != nullptr; } in isMultiDest()
1526 Variable *getDestHi() const { return DestHi; } in getDestHi()
1535 Variable *DestHi = nullptr; variable
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| D | IceTargetLoweringARM32.h | 828 void _umull(Variable *DestLo, Variable *DestHi, Variable *Src0,
835 Context.insert<InstFakeDef>(DestHi);
836 Context.insert<InstARM32Umull>(DestLo, DestHi, Src0, Src1, Pred);
837 Context.insert<InstFakeDef>(DestHi, DestLo)->setDestRedefined();
838 Context.insert<InstFakeUse>(DestHi);
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| D | IceInstMIPS32.cpp | 305 DestHi = Dest64->getHi(); in InstMIPS32Mov()
715 Variable *DestHi = getDestHi(); in dump() local
717 if (DestHi) { in dump()
719 DestHi->dump(Func); in dump()
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| D | IceInstMIPS32.h | 1313 Variable *getDestHi() const { return DestHi; } in getDestHi()
1322 Variable *DestHi = nullptr; variable
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| D | IceTargetLoweringX86Base.h | 1128 Operand *Src1Lo, Variable *DestLo, Variable *DestHi);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 90 Register DestHi = TRI->getSubReg(DestReg, Hexagon::isub_hi); in runOnMachineFunction() local
97 BuildMI(B, MI, DL, TII->get(Hexagon::A2_tfrsi), DestHi) in runOnMachineFunction()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 141 unsigned DestHi = TRI->getSubReg(DestReg, Hexagon::subreg_hireg); in runOnMachineFunction() local
150 DestHi) in runOnMachineFunction()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 55 unsigned DestLo, DestHi, SrcLo, SrcHi; in copyPhysReg() local
57 TRI.splitReg(DestReg, DestLo, DestHi); in copyPhysReg()
63 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestHi) in copyPhysReg()
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 55 Register DestLo, DestHi, SrcLo, SrcHi; in copyPhysReg() local
57 TRI.splitReg(DestReg, DestLo, DestHi); in copyPhysReg()
63 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestHi) in copyPhysReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 679 MachineOperand &DestHi = MI.getOperand(1); in expandCMP_SWAP_128() local
708 LoadCmpBB->addLiveIn(DestHi.getReg()); in expandCMP_SWAP_128()
715 .addReg(DestHi.getReg(), RegState::Define) in expandCMP_SWAP_128()
722 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 260 MachineOperand &DestHi = MI.getOperand(1); in expandCMP_SWAP_128() local
288 .addReg(DestHi.getReg(), RegState::Define) in expandCMP_SWAP_128()
299 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 265 MachineOperand &DestHi = MI.getOperand(1); in expandCMP_SWAP_128() local
293 .addReg(DestHi.getReg(), RegState::Define) in expandCMP_SWAP_128()
304 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 895 unsigned DestHi = TRI->getSubReg(Dest.getReg(), ARM::gsub_1); in ExpandCMP_SWAP_64() local
938 .addReg(DestHi, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 1065 Register DestHi = TRI->getSubReg(Dest.getReg(), ARM::gsub_1); in ExpandCMP_SWAP_64() local
1096 .addReg(DestHi, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 1690 Register DestHi = TRI->getSubReg(Dest.getReg(), ARM::gsub_1); in ExpandCMP_SWAP_64() local
1721 .addReg(DestHi, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64()
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