| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64PostLegalizerCombiner.cpp | 102 auto Elt1 = B.buildExtractVectorElement(Ty, Src, B.buildConstant(s64, 1)); in applyExtractVecEltPairwiseAdd() local
103 B.buildInstr(Opc, {MI.getOperand(0).getReg()}, {Elt0, Elt1}); in applyExtractVecEltPairwiseAdd()
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| /external/llvm/unittests/IR/ |
| D | IRBuilderTest.cpp | 362 auto Elt1 = Builder.getInt64(-1); in TEST_F() local
365 Vec = Builder.CreateInsertElement(Vec, Elt1, Builder.getInt8(1)); in TEST_F()
369 EXPECT_EQ(Elt1, X1); in TEST_F()
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| /external/llvm-project/llvm/unittests/IR/ |
| D | IRBuilderTest.cpp | 838 auto Elt1 = Builder.getInt64(-1); in TEST_F() local
841 Vec = Builder.CreateInsertElement(Vec, Elt1, Builder.getInt8(1)); in TEST_F()
845 EXPECT_EQ(Elt1, X1); in TEST_F()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 1185 SDValue Elt1 = OutVals[OIdx++]; in LowerCall() local
1188 Elt1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt1); in LowerCall()
1195 Elt1, InFlag }; in LowerCall()
2245 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, P, in LowerFormalArguments() local
2250 Elt1 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt1); in LowerFormalArguments()
2254 InVals.push_back(Elt1); in LowerFormalArguments()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | AutoUpgrade.cpp | 1933 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), in UpgradeIntrinsicCall() local
1937 EltOp = Builder.CreateFAdd(Elt0, Elt1); in UpgradeIntrinsicCall()
1939 EltOp = Builder.CreateFSub(Elt0, Elt1); in UpgradeIntrinsicCall()
1941 EltOp = Builder.CreateFMul(Elt0, Elt1); in UpgradeIntrinsicCall()
1943 EltOp = Builder.CreateFDiv(Elt0, Elt1); in UpgradeIntrinsicCall()
|
| /external/llvm-project/llvm/lib/IR/ |
| D | AutoUpgrade.cpp | 2042 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), in UpgradeIntrinsicCall() local
2046 EltOp = Builder.CreateFAdd(Elt0, Elt1); in UpgradeIntrinsicCall()
2048 EltOp = Builder.CreateFSub(Elt0, Elt1); in UpgradeIntrinsicCall()
2050 EltOp = Builder.CreateFMul(Elt0, Elt1); in UpgradeIntrinsicCall()
2052 EltOp = Builder.CreateFDiv(Elt0, Elt1); in UpgradeIntrinsicCall()
|
| /external/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 235 ; SCALAR-NEXT: %Elt1 = extractelement <8 x i32> %a1, i32 1
237 ; SCALAR-NEXT: store i32 %Elt1, i32* %Ptr12, align 4
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4969 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, in lowerVECTOR_SHUFFLE() local
4971 Pieces.push_back(DAG.getBuildVector(PackVT, SL, { Elt0, Elt1 })); in lowerVECTOR_SHUFFLE()
9325 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, in performExtractVectorEltCombine() local
9329 DCI.AddToWorklist(Elt1.getNode()); in performExtractVectorEltCombine()
9330 return DAG.getNode(Opc, SL, EltVT, Elt0, Elt1, Vec->getFlags()); in performExtractVectorEltCombine()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 5556 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, in lowerVECTOR_SHUFFLE() local
5558 Pieces.push_back(DAG.getBuildVector(PackVT, SL, { Elt0, Elt1 })); in lowerVECTOR_SHUFFLE()
10091 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, in performExtractVectorEltCombine() local
10095 DCI.AddToWorklist(Elt1.getNode()); in performExtractVectorEltCombine()
10096 return DAG.getNode(Opc, SL, EltVT, Elt0, Elt1, Vec->getFlags()); in performExtractVectorEltCombine()
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 284 ; SCALAR-NEXT: %Elt1 = extractelement <8 x i32> %a1, i64 1
286 ; SCALAR-NEXT: store i32 %Elt1, i32* %Ptr12, align 4
|