| /external/llvm-project/llvm/lib/Transforms/Vectorize/ |
| D | VectorCombine.cpp | 72 ExtractElementInst *Ext1,
74 bool isExtractExtractCheap(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
78 void foldExtExtCmp(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
80 void foldExtExtBinop(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
182 ExtractElementInst *Ext0, ExtractElementInst *Ext1, in getShuffleExtract() argument
185 isa<ConstantInt>(Ext1->getIndexOperand()) && in getShuffleExtract()
189 unsigned Index1 = cast<ConstantInt>(Ext1->getIndexOperand())->getZExtValue(); in getShuffleExtract()
196 assert(VecTy == Ext1->getVectorOperand()->getType() && "Need matching types"); in getShuffleExtract()
198 int Cost1 = TTI.getVectorInstrCost(Ext1->getOpcode(), VecTy, Index1); in getShuffleExtract()
206 return Ext1; in getShuffleExtract()
[all …]
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| /external/llvm-project/llvm/include/llvm/BinaryFormat/ |
| D | MsgPack.def | 94 HANDLE_MP_FIX_LEN(0x01, Ext1)
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/ |
| D | MsgPack.def | 94 HANDLE_MP_FIX_LEN(0x01, Ext1)
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| /external/llvm-project/llvm/lib/BinaryFormat/ |
| D | MsgPackWriter.cpp | 177 case FixLen::Ext1: in writeExt()
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| D | MsgPackReader.cpp | 120 return createExt(Obj, FixLen::Ext1); in read()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/BinaryFormat/ |
| D | MsgPackWriter.cpp | 177 case FixLen::Ext1: in writeExt()
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| /external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | lookahead.ll | 229 …al_uses(double* %A, double *%B, double *%C, double *%D, double *%S, double *%Ext1, double *%Ext2) {
300 store double %A1, double *%Ext1, align 8
319 …dget(double* %A, double *%B, double *%C, double *%D, double *%S, double *%Ext1, double *%Ext2, dou…
392 store double %A1, double *%Ext1, align 8
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9565 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
9571 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
9577 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
9579 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
12282 SDValue Ext1 = Mul.getOperand(1); in PerformVQDMULHCombine() local
12284 Ext1.getOpcode() != ISD::SIGN_EXTEND) in PerformVQDMULHCombine()
12289 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
12296 Ext1.getOperand(0)); in PerformVQDMULHCombine()
16630 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
16636 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 10326 SDValue Ext1 = N->getOperand(0).getOperand(0); in DAGCombineBuildVector() local
10328 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
10332 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
10336 if (Ext1.getValueType() != MVT::i32 || in DAGCombineBuildVector()
10338 if (Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
10351 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9011 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
9017 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
9019 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
9055 auto Ext1 = cast<Instruction>(I->getOperand(0)); in shouldSinkOperands() local
9057 if (areExtractShuffleVectors(Ext1, Ext2)) { in shouldSinkOperands()
9058 Ops.push_back(&Ext1->getOperandUse(0)); in shouldSinkOperands()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 2541 auto Ext1 = B.buildFPExt(S32, Src1, Flags); in legalizeFPow() local
2544 .addUse(Ext1.getReg(0)) in legalizeFPow()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 13298 SDValue Ext1 = FirstInput.getOperand(0); in DAGCombineBuildVector() local
13300 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
13304 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
13308 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 || in DAGCombineBuildVector()
13309 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
13322 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 14158 SDValue Ext1 = FirstInput.getOperand(0); in DAGCombineBuildVector() local
14160 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
14164 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
14168 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 || in DAGCombineBuildVector()
14169 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
14182 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 10759 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
10765 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
10767 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
10828 auto Ext1 = cast<Instruction>(I->getOperand(0)); in shouldSinkOperands() local
10830 if (areExtractShuffleVectors(Ext1, Ext2)) { in shouldSinkOperands()
10831 Ops.push_back(&Ext1->getOperandUse(0)); in shouldSinkOperands()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 14936 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
14942 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
14944 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 35736 SDValue Ext1 = in SimplifyDemandedVectorEltsForTargetNode() local
35738 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ext0, Ext1); in SimplifyDemandedVectorEltsForTargetNode()
37193 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
37195 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
37216 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
37220 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
45794 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128); in combineExtractSubvector() local
45796 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineExtractSubvector()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 39930 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
39932 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
39953 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
39957 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
49323 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128); in combineExtractSubvector() local
49325 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineExtractSubvector()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 17050 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); in scalarizeExtractedBinop() local
17051 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 18180 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); in scalarizeExtractedBinop() local
18181 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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