| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | machine-combiner-instr-fmf.mir | 3 # Can create FMADD, because both the fmul and fadd have all fast-math flags.
42 # Can create FMADD, because both the fmul and fadd have the contract fast-math flag.
82 # Do not create FMADD, because we don't have the contract flag on the FADD.
122 # Do create FMADD, because we have the contract flag on the FADD.
162 # Do not create FMADD, as nsz flag does not allow it.
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1489 X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_128, FMA_OP_MASK, X86ISD::FMADD, 0),
1490 X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_256, FMA_OP_MASK, X86ISD::FMADD, 0),
1491 X86_INTRINSIC_DATA(avx512_mask_vfmadd_pd_512, FMA_OP_MASK, X86ISD::FMADD,
1493 X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_128, FMA_OP_MASK, X86ISD::FMADD, 0),
1494 X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_256, FMA_OP_MASK, X86ISD::FMADD, 0),
1495 X86_INTRINSIC_DATA(avx512_mask_vfmadd_ps_512, FMA_OP_MASK, X86ISD::FMADD,
1629 X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_128, FMA_OP_MASK3, X86ISD::FMADD, 0),
1630 X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_256, FMA_OP_MASK3, X86ISD::FMADD, 0),
1631 X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_512, FMA_OP_MASK3, X86ISD::FMADD,
1633 X86_INTRINSIC_DATA(avx512_mask3_vfmadd_ps_128, FMA_OP_MASK3, X86ISD::FMADD, 0),
[all …]
|
| D | X86ISelLowering.h | 474 FMADD, enumerator
|
| D | X86InstrFragmentsSIMD.td | 469 def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
|
| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 310 CASE_FMA4_PACKED_RR(FMADD) in printFMAComments()
311 CASE_FMA4_SCALAR_RR(FMADD) in printFMAComments()
314 CASE_FMA4_PACKED_RM(FMADD) in printFMAComments()
315 CASE_FMA4_SCALAR_RM(FMADD) in printFMAComments()
319 CASE_FMA4_PACKED_MR(FMADD) in printFMAComments()
320 CASE_FMA4_SCALAR_MR(FMADD) in printFMAComments()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 25 Altivec: Codegen'ing MUL with vector FMADD should add -0.0, not 0.0:
|
| D | PPCInstrInfo.td | 2531 defm FMADD : AForm_1r<63, 29,
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 25 Altivec: Codegen'ing MUL with vector FMADD should add -0.0, not 0.0:
|
| D | P9InstrResources.td | 415 (instregex "FMADD(S)?$"),
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| D | PPCInstrInfo.cpp | 294 {PPC::FMADD, PPC::FADD, PPC::FMUL, 3, 1},
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| D | PPCInstrInfo.td | 3153 defm FMADD : AForm_1r<63, 29,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 25 Altivec: Codegen'ing MUL with vector FMADD should add -0.0, not 0.0:
|
| D | P9InstrResources.td | 414 (instregex "FMADD(S)?$"),
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| D | PPCInstrInfo.td | 2940 defm FMADD : AForm_1r<63, 29,
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenMCCodeEmitter.inc | 934 UINT64_C(4227858490), // FMADD
3525 case PPC::FMADD:
7344 CEFBS_None, // FMADD = 921
|
| D | PPCGenInstrInfo.inc | 936 FMADD = 921,
3905 …Commutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #921 = FMADD
12648 { PPC::FMADD_rec, PPC::FMADD },
12848 { PPC::FMADD, PPC::FMADD_rec },
|
| D | PPCGenAsmWriter.inc | 2589 19928U, // FMADD
4880 134U, // FMADD
|
| D | PPCGenDisassemblerTables.inc | 3537 /* 16990 */ MCD::OPC_Decode, 153, 7, 177, 1, // Opcode: FMADD
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX3T110.td | 1289 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
|
| D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 535 19100U, // FMADD
2057 80U, // FMADD
4666 // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD...
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| D | PPCGenDisassemblerTables.inc | 2363 /* 9929 */ MCD_OPC_Decode, 131, 4, 112, // Opcode: FMADD
|
| /external/vixl/src/aarch64/ |
| D | disasm-aarch64.cc | 1884 FORMAT(FMADD, "fmadd"); in VisitFPDataProcessing3Source()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3835 ### FMADD ### subsection
|