/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86InstComments.cpp | 342 CASE_FMA4_PACKED_RR(FNMADD) in printFMAComments() 343 CASE_FMA4_SCALAR_RR(FNMADD) in printFMAComments() 346 CASE_FMA4_PACKED_RM(FNMADD) in printFMAComments() 347 CASE_FMA4_SCALAR_RM(FNMADD) in printFMAComments() 352 CASE_FMA4_PACKED_MR(FNMADD) in printFMAComments() 353 CASE_FMA4_SCALAR_MR(FNMADD) in printFMAComments()
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/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 1509 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_128, FMA_OP_MASK, X86ISD::FNMADD, 0), 1510 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_256, FMA_OP_MASK, X86ISD::FNMADD, 0), 1511 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_512, FMA_OP_MASK, X86ISD::FNMADD, 1513 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_128, FMA_OP_MASK, X86ISD::FNMADD, 0), 1514 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_256, FMA_OP_MASK, X86ISD::FNMADD, 0), 1515 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_512, FMA_OP_MASK, X86ISD::FNMADD, 1854 X86_INTRINSIC_DATA(fma_vfnmadd_pd, INTR_TYPE_3OP, X86ISD::FNMADD, 0), 1855 X86_INTRINSIC_DATA(fma_vfnmadd_pd_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0), 1856 X86_INTRINSIC_DATA(fma_vfnmadd_ps, INTR_TYPE_3OP, X86ISD::FNMADD, 0), 1857 X86_INTRINSIC_DATA(fma_vfnmadd_ps_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
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D | X86ISelLowering.h | 475 FNMADD, enumerator
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D | X86InstrFragmentsSIMD.td | 470 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 551 FNMADD, enumerator
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D | X86InstrFragmentsSIMD.td | 543 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFPTernaryOp, [SDNPCommutative]>;
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D | X86ISelLowering.cpp | 30964 NODE_NAME_CASE(FNMADD) in getTargetNodeName() 45913 case ISD::FMA: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 45919 case X86ISD::FNMADD: Opcode = ISD::FMA; break; in negateFMAOpcode() 45937 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode() 45940 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 45956 case X86ISD::FMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 45958 case X86ISD::FNMADD: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode() 46023 case X86ISD::FNMADD: in getNegatedExpression() 49863 case X86ISD::FNMADD: in PerformDAGCombine()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 471 FNMADD, enumerator
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D | X86InstrFragmentsSIMD.td | 537 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFPTernaryOp, [SDNPCommutative]>;
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D | X86ISelLowering.cpp | 29820 case X86ISD::FNMADD: return "X86ISD::FNMADD"; in getTargetNodeName() 42517 case ISD::FMA: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 42521 case X86ISD::FNMADD: Opcode = ISD::FMA; break; in negateFMAOpcode() 42535 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode() 42537 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 42551 case X86ISD::FMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 42553 case X86ISD::FNMADD: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode() 42596 case X86ISD::FNMADD: in combineFneg() 42631 case X86ISD::FNMADD: in isNegatibleForFree() 42671 case X86ISD::FNMADD: in getNegatedExpression() [all …]
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | P9InstrResources.td | 422 FNMADD,
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D | PPCInstrInfo.td | 3171 defm FNMADD : AForm_1r<63, 31, 3532 (FNMADD $A, $B, $C)>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | P9InstrResources.td | 421 FNMADD,
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 956 UINT64_C(4227858494), // FNMADD 3533 case PPC::FNMADD: 7366 CEFBS_None, // FNMADD = 943
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D | PPCGenInstrInfo.inc | 958 FNMADD = 943, 3927 …ommutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #943 = FNMADD 12659 { PPC::FNMADD_rec, PPC::FNMADD }, 12859 { PPC::FNMADD, PPC::FNMADD_rec },
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D | PPCGenAsmWriter.inc | 2611 19937U, // FNMADD 4902 134U, // FNMADD
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SchedThunderX3T110.td | 1289 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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D | AArch64InstrInfo.td | 3706 defm FNMADD : ThreeOperandFPData<1, 0, "fnmadd", 3717 // Here we handle first -(a + b*c) for FNMADD:
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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/external/capstone/arch/PowerPC/ |
D | PPCGenAsmWriter.inc | 557 19109U, // FNMADD 2079 80U, // FNMADD 4666 // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD...
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D | PPCGenDisassemblerTables.inc | 2371 /* 9961 */ MCD_OPC_Decode, 153, 4, 112, // Opcode: FNMADD
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/external/vixl/src/aarch64/ |
D | disasm-aarch64.cc | 1886 FORMAT(FNMADD, "fnmadd"); in VisitFPDataProcessing3Source()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2635 defm FNMADD : ThreeOperandFPData<1, 0, "fnmadd", 2651 // We handled -(a + b*c) for FNMADD above, now it's time for "(-a) + (-b)*c" and
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 4166 ### FNMADD ### subsection
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