/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelDAGToDAG.cpp | 37 bool ForCodeSize; member in __anon275999db0111::WebAssemblyDAGToDAGISel 42 : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) { in WebAssemblyDAGToDAGISel() 50 ForCodeSize = in runOnMachineFunction()
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/external/llvm-project/llvm/lib/Target/VE/ |
D | VEISelLowering.h | 144 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 175 bool LegalOperations, bool ForCodeSize, 188 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 5483 bool LegalOperations, bool ForCodeSize, in isNegatibleForFree() argument 5510 ForCodeSize); in isNegatibleForFree() 5526 ForCodeSize); in isNegatibleForFree() 5539 ForCodeSize, Depth + 1)) in isNegatibleForFree() 5543 ForCodeSize, Depth + 1); in isNegatibleForFree() 5556 ForCodeSize, Depth + 1)) in isNegatibleForFree() 5565 ForCodeSize, Depth + 1); in isNegatibleForFree() 5575 ForCodeSize, Depth + 1); in isNegatibleForFree() 5581 ForCodeSize, Depth + 1); in isNegatibleForFree() 5583 ForCodeSize, Depth + 1); in isNegatibleForFree() [all …]
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D | DAGCombiner.cpp | 137 bool ForCodeSize; member in __anoned4f2b140111::DAGCombiner 227 ForCodeSize = DAG.shouldOptForSize(); in DAGCombiner() 12159 TLI.isNegatibleForFree(N1, DAG, LegalOperations, ForCodeSize) == 2) in visitFADD() 12162 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize), Flags); in visitFADD() 12166 TLI.isNegatibleForFree(N0, DAG, LegalOperations, ForCodeSize) == 2) in visitFADD() 12169 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize), Flags); in visitFADD() 12348 if (TLI.isNegatibleForFree(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB() 12349 return TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize); in visitFSUB() 12367 if (TLI.isNegatibleForFree(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB() 12370 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize), Flags); in visitFSUB() [all …]
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/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.h | 105 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 837 bool ForCodeSize, unsigned Depth) const override; 841 bool LegalOperations, bool ForCodeSize, 1105 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 952 bool LegalOperations, bool ForCodeSize, 1231 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 181 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 431 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 428 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 296 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 151 bool ForCodeSize; member in __anonb487e2000111::DAGCombiner 243 ForCodeSize = DAG.shouldOptForSize(); in DAGCombiner() 13159 N1, DAG, LegalOperations, ForCodeSize)) in visitFADD() 13165 N0, DAG, LegalOperations, ForCodeSize)) in visitFADD() 13313 N1, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD() 13321 N0, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD() 13377 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB() 13397 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB() 13482 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMUL() 13484 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMUL() [all …]
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/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 665 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 682 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 304 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 873 bool ForCodeSize = false) const { 3420 bool LegalOperations, bool ForCodeSize, 3425 bool LegalOperations, bool ForCodeSize,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 508 bool ForCodeSize = false) const override;
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 555 bool ForCodeSize = false) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 365 bool ForCodeSize) const override;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 966 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 1029 bool ForCodeSize) const override;
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 504 bool ForCodeSize) const override;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 94 bool ForCodeSize; member in __anonbfbf49f20111::DAGCombiner 482 ForCodeSize = DAG.getMachineFunction().getFunction()->optForSize(); in DAGCombiner() 10192 bool ForCodeSize; member 10200 Cost(bool ForCodeSize = false) in Cost() 10201 : ForCodeSize(ForCodeSize), Loads(0), Truncates(0), in Cost() 10205 Cost(const LoadedSlice &LS, bool ForCodeSize = false) in Cost() 10206 : ForCodeSize(ForCodeSize), Loads(1), Truncates(0), in Cost() 10257 if (!ForCodeSize && ExpensiveOpsLHS != ExpensiveOpsRHS) in operator <() 10582 const APInt &UsedBits, bool ForCodeSize) { in isSlicingProfitable() argument 10596 LoadedSlice::Cost OrigCost(ForCodeSize), GlobalSlicingCost(ForCodeSize); in isSlicingProfitable() [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 42 bool ForCodeSize; member in __anonec6fe5f10111::AArch64DAGToDAGISel 48 ForCodeSize(false) {} in AArch64DAGToDAGISel() 55 ForCodeSize = MF.getFunction()->optForSize(); in runOnMachineFunction() 335 return ForCodeSize || V.hasOneUse(); in isWorthFolding()
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