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Searched refs:GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE (Results 1 – 10 of 10) sorted by relevance

/external/igt-gpu-tools/lib/
Dgen6_render.h689 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 macro
/external/mesa3d/src/intel/compiler/
Dbrw_eu_defines.h1356 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12 macro
Dbrw_disasm.c372 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
1948 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE in brw_disassemble_inst()
Dbrw_schedule_instructions.cpp415 case GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE: in set_latency_gen7()
Dbrw_eu_emit.c2427 msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; in brw_fb_WRITE()
Dbrw_fs.cpp4570 GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE, in lower_fb_write_logical_send()
/external/igt-gpu-tools/assembler/
Dbrw_defines.h990 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12 macro
Dgen8_disasm.c224 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
Dbrw_eu_emit.c612 if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE) in brw_set_dp_write_message()
2165 msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; in brw_fb_WRITE()
Dbrw_disasm.c321 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",